Firmware for MNT ZZ9000 graphics and ARM coprocessor card for Amiga computers.
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ulpi.h 9.5KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Generic ULPI interface.
  4. *
  5. * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
  6. * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
  7. *
  8. * Authors: Jana Rapava <fermata7@gmail.com>
  9. * Igor Grinberg <grinberg@compulab.co.il>
  10. *
  11. * Register offsets taken from:
  12. * linux/include/linux/usb/ulpi.h
  13. *
  14. * Original Copyrights follow:
  15. * Copyright (C) 2010 Nokia Corporation
  16. */
  17. #ifndef __USB_ULPI_H__
  18. #define __USB_ULPI_H__
  19. #define ULPI_ERROR (1 << 8) /* overflow from any register value */
  20. #ifndef CONFIG_USB_ULPI_TIMEOUT
  21. #define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */
  22. #endif
  23. /*
  24. * ulpi view port address and
  25. * Port_number that can be passed.
  26. * Any additional data to be passed can
  27. * be extended from this structure
  28. */
  29. struct ulpi_viewport {
  30. uintptr_t viewport_addr;
  31. u32 port_num;
  32. };
  33. /*
  34. * Initialize the ULPI transciever and check the interface integrity.
  35. * @ulpi_vp - structure containing ULPI viewport data
  36. *
  37. * returns 0 on success, ULPI_ERROR on failure.
  38. */
  39. int ulpi_init(struct ulpi_viewport *ulpi_vp);
  40. /*
  41. * Select transceiver speed.
  42. * @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
  43. * ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS
  44. * returns 0 on success, ULPI_ERROR on failure.
  45. */
  46. int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);
  47. /*
  48. * Enable/disable VBUS.
  49. * @ext_power - external VBUS supply is used (default is false)
  50. * @ext_indicator - external VBUS over-current indicator is used
  51. *
  52. * returns 0 on success, ULPI_ERROR on failure.
  53. */
  54. int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power);
  55. /*
  56. * Configure VBUS indicator
  57. * @external - external VBUS over-current indicator is used
  58. * @passthru - disables ANDing of internal VBUS comparator
  59. * with external VBUS input
  60. * @complement - inverts the external VBUS input
  61. */
  62. int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external,
  63. int passthru, int complement);
  64. /*
  65. * Enable/disable pull-down resistors on D+ and D- USB lines.
  66. *
  67. * returns 0 on success, ULPI_ERROR on failure.
  68. */
  69. int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable);
  70. /*
  71. * Select OpMode.
  72. * @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
  73. * ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP
  74. *
  75. * returns 0 on success, ULPI_ERROR on failure.
  76. */
  77. int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode);
  78. /*
  79. * Switch to Serial Mode.
  80. * @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
  81. *
  82. * returns 0 on success, ULPI_ERROR on failure.
  83. *
  84. * Notes:
  85. * Switches immediately to Serial Mode.
  86. * To return from Serial Mode, STP line needs to be asserted.
  87. */
  88. int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode);
  89. /*
  90. * Put PHY into low power mode.
  91. *
  92. * returns 0 on success, ULPI_ERROR on failure.
  93. *
  94. * Notes:
  95. * STP line must be driven low to keep the PHY in suspend.
  96. * To resume the PHY, STP line needs to be asserted.
  97. */
  98. int ulpi_suspend(struct ulpi_viewport *ulpi_vp);
  99. /*
  100. * Reset the transceiver. ULPI interface and registers are not affected.
  101. *
  102. * returns 0 on success, ULPI_ERROR on failure.
  103. */
  104. int ulpi_reset(struct ulpi_viewport *ulpi_vp);
  105. /* ULPI access methods below must be implemented for each ULPI viewport. */
  106. /*
  107. * Write to the ULPI PHY register via the viewport.
  108. * @reg - the ULPI register (one of the fields in struct ulpi_regs).
  109. * Due to ULPI design, only 8 lsb of address are used.
  110. * @value - the value - only 8 lower bits are used, others ignored.
  111. *
  112. * returns 0 on success, ULPI_ERROR on failure.
  113. */
  114. int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);
  115. /*
  116. * Read the ULPI PHY register content via the viewport.
  117. * @reg - the ULPI register (one of the fields in struct ulpi_regs).
  118. * Due to ULPI design, only 8 lsb of address are used.
  119. *
  120. * returns register content on success, ULPI_ERROR on failure.
  121. */
  122. u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg);
  123. /*
  124. * Wait for the reset to complete.
  125. * The Link must not attempt to access the PHY until the reset has
  126. * completed and DIR line is de-asserted.
  127. */
  128. int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp);
  129. /* Access Extended Register Set (indicator) */
  130. #define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */
  131. /* Vendor-specific */
  132. #define VENDOR_SPEC_OFFSET 0x30
  133. /*
  134. * Extended Register Set
  135. *
  136. * Addresses 0x00-0x3F map directly to Immediate Register Set.
  137. * Addresses 0x40-0x7F are reserved.
  138. * Addresses 0x80-0xff are vendor-specific.
  139. */
  140. #define EXT_VENDOR_SPEC_OFFSET 0x80
  141. /* ULPI registers, bits and offsets definitions */
  142. struct ulpi_regs {
  143. /* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
  144. u8 vendor_id_low;
  145. u8 vendor_id_high;
  146. u8 product_id_low;
  147. u8 product_id_high;
  148. /* Function Control: 0x04 - 0x06 Read */
  149. u8 function_ctrl; /* 0x04 Write */
  150. u8 function_ctrl_set; /* 0x05 Set */
  151. u8 function_ctrl_clear; /* 0x06 Clear */
  152. /* Interface Control: 0x07 - 0x09 Read */
  153. u8 iface_ctrl; /* 0x07 Write */
  154. u8 iface_ctrl_set; /* 0x08 Set */
  155. u8 iface_ctrl_clear; /* 0x09 Clear */
  156. /* OTG Control: 0x0A - 0x0C Read */
  157. u8 otg_ctrl; /* 0x0A Write */
  158. u8 otg_ctrl_set; /* 0x0B Set */
  159. u8 otg_ctrl_clear; /* 0x0C Clear */
  160. /* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
  161. u8 usb_ie_rising; /* 0x0D Write */
  162. u8 usb_ie_rising_set; /* 0x0E Set */
  163. u8 usb_ie_rising_clear; /* 0x0F Clear */
  164. /* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
  165. u8 usb_ie_falling; /* 0x10 Write */
  166. u8 usb_ie_falling_set; /* 0x11 Set */
  167. u8 usb_ie_falling_clear; /* 0x12 Clear */
  168. /* USB Interrupt Status: 0x13 Read-only */
  169. u8 usb_int_status;
  170. /* USB Interrupt Latch: 0x14 Read-only with auto-clear */
  171. u8 usb_int_latch;
  172. /* Debug: 0x15 Read-only */
  173. u8 debug;
  174. /* Scratch Register: 0x16 - 0x18 Read */
  175. u8 scratch; /* 0x16 Write */
  176. u8 scratch_set; /* 0x17 Set */
  177. u8 scratch_clear; /* 0x18 Clear */
  178. /*
  179. * Optional Carkit registers:
  180. * Carkit Control: 0x19 - 0x1B Read
  181. */
  182. u8 carkit_ctrl; /* 0x19 Write */
  183. u8 carkit_ctrl_set; /* 0x1A Set */
  184. u8 carkit_ctrl_clear; /* 0x1B Clear */
  185. /* Carkit Interrupt Delay: 0x1C Read, Write */
  186. u8 carkit_int_delay;
  187. /* Carkit Interrupt Enable: 0x1D - 0x1F Read */
  188. u8 carkit_ie; /* 0x1D Write */
  189. u8 carkit_ie_set; /* 0x1E Set */
  190. u8 carkit_ie_clear; /* 0x1F Clear */
  191. /* Carkit Interrupt Status: 0x20 Read-only */
  192. u8 carkit_int_status;
  193. /* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
  194. u8 carkit_int_latch;
  195. /* Carkit Pulse Control: 0x22 - 0x24 Read */
  196. u8 carkit_pulse_ctrl; /* 0x22 Write */
  197. u8 carkit_pulse_ctrl_set; /* 0x23 Set */
  198. u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */
  199. /*
  200. * Other optional registers:
  201. * Transmit Positive Width: 0x25 Read, Write
  202. */
  203. u8 transmit_pos_width;
  204. /* Transmit Negative Width: 0x26 Read, Write */
  205. u8 transmit_neg_width;
  206. /* Receive Polarity Recovery: 0x27 Read, Write */
  207. u8 recv_pol_recovery;
  208. /*
  209. * Addresses 0x28 - 0x2E are reserved, so we use offsets
  210. * for immediate registers with higher addresses
  211. */
  212. };
  213. /*
  214. * Register Bits
  215. */
  216. /* Function Control */
  217. #define ULPI_FC_XCVRSEL_MASK (3 << 0)
  218. #define ULPI_FC_HIGH_SPEED (0 << 0)
  219. #define ULPI_FC_FULL_SPEED (1 << 0)
  220. #define ULPI_FC_LOW_SPEED (2 << 0)
  221. #define ULPI_FC_FS4LS (3 << 0)
  222. #define ULPI_FC_TERMSELECT (1 << 2)
  223. #define ULPI_FC_OPMODE_MASK (3 << 3)
  224. #define ULPI_FC_OPMODE_NORMAL (0 << 3)
  225. #define ULPI_FC_OPMODE_NONDRIVING (1 << 3)
  226. #define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3)
  227. #define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3)
  228. #define ULPI_FC_RESET (1 << 5)
  229. #define ULPI_FC_SUSPENDM (1 << 6)
  230. /* Interface Control */
  231. #define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0)
  232. #define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1)
  233. #define ULPI_IFACE_CARKITMODE (1 << 2)
  234. #define ULPI_IFACE_CLOCKSUSPENDM (1 << 3)
  235. #define ULPI_IFACE_AUTORESUME (1 << 4)
  236. #define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5)
  237. #define ULPI_IFACE_PASSTHRU (1 << 6)
  238. #define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7)
  239. /* OTG Control */
  240. #define ULPI_OTG_ID_PULLUP (1 << 0)
  241. #define ULPI_OTG_DP_PULLDOWN (1 << 1)
  242. #define ULPI_OTG_DM_PULLDOWN (1 << 2)
  243. #define ULPI_OTG_DISCHRGVBUS (1 << 3)
  244. #define ULPI_OTG_CHRGVBUS (1 << 4)
  245. #define ULPI_OTG_DRVVBUS (1 << 5)
  246. #define ULPI_OTG_DRVVBUS_EXT (1 << 6)
  247. #define ULPI_OTG_EXTVBUSIND (1 << 7)
  248. /*
  249. * USB Interrupt Enable Rising,
  250. * USB Interrupt Enable Falling,
  251. * USB Interrupt Status and
  252. * USB Interrupt Latch
  253. */
  254. #define ULPI_INT_HOST_DISCONNECT (1 << 0)
  255. #define ULPI_INT_VBUS_VALID (1 << 1)
  256. #define ULPI_INT_SESS_VALID (1 << 2)
  257. #define ULPI_INT_SESS_END (1 << 3)
  258. #define ULPI_INT_IDGRD (1 << 4)
  259. /* Debug */
  260. #define ULPI_DEBUG_LINESTATE0 (1 << 0)
  261. #define ULPI_DEBUG_LINESTATE1 (1 << 1)
  262. /* Carkit Control */
  263. #define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0)
  264. #define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1)
  265. #define ULPI_CARKIT_CTRL_TXDEN (1 << 2)
  266. #define ULPI_CARKIT_CTRL_RXDEN (1 << 3)
  267. #define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4)
  268. #define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5)
  269. #define ULPI_CARKIT_CTRL_MICEN (1 << 6)
  270. /* Carkit Interrupt Enable */
  271. #define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0)
  272. #define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1)
  273. #define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2)
  274. #define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3)
  275. #define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4)
  276. /* Carkit Interrupt Status and Latch */
  277. #define ULPI_CARKIT_INT_IDFLOAT (1 << 0)
  278. #define ULPI_CARKIT_INT_CARINTDET (1 << 1)
  279. #define ULPI_CARKIT_INT_DP (1 << 2)
  280. /* Carkit Pulse Control*/
  281. #define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
  282. #define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
  283. #define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
  284. #define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
  285. #endif /* __USB_ULPI_H__ */