Firmware for MNT ZZ9000 graphics and ARM coprocessor card for Amiga computers.
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io.h 10KB

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  1. /*
  2. * linux/include/asm-arm/io.h
  3. *
  4. * Copyright (C) 1996-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Modifications:
  11. * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
  12. * constant addresses and variable addresses.
  13. * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
  14. * specific IO header files.
  15. * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
  16. * 04-Apr-1999 PJB Added check_signature.
  17. * 12-Dec-1999 RMK More cleanups
  18. * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
  19. */
  20. #ifndef __ASM_ARM_IO_H
  21. #define __ASM_ARM_IO_H
  22. #include <linux/types.h>
  23. #include <asm/byteorder.h>
  24. #include <xpseudo_asm.h>
  25. #include "memalign.h"
  26. static inline void sync(void)
  27. {
  28. }
  29. /*
  30. * Generic virtual read/write. Note that we don't support half-word
  31. * read/writes. We define __arch_*[bl] here, and leave __arch_*w
  32. * to the architecture specific code.
  33. */
  34. #define __arch_getb(a) (*(volatile unsigned char *)(a))
  35. #define __arch_getw(a) (*(volatile unsigned short *)(a))
  36. #define __arch_getl(a) (*(volatile unsigned long *)(a))
  37. #define __arch_getq(a) (*(volatile unsigned long long *)(a))
  38. #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
  39. #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
  40. #define __arch_putl(v,a) (*(volatile unsigned long *)(a) = (v))
  41. #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v))
  42. static inline void __raw_writesb(unsigned long addr, const void *data,
  43. int bytelen)
  44. {
  45. uint8_t *buf = (uint8_t *)data;
  46. while(bytelen--)
  47. __arch_putb(*buf++, addr);
  48. }
  49. static inline void __raw_writesw(unsigned long addr, const void *data,
  50. int wordlen)
  51. {
  52. uint16_t *buf = (uint16_t *)data;
  53. while(wordlen--)
  54. __arch_putw(*buf++, addr);
  55. }
  56. static inline void __raw_writesl(unsigned long addr, const void *data,
  57. int longlen)
  58. {
  59. uint32_t *buf = (uint32_t *)data;
  60. while(longlen--)
  61. __arch_putl(*buf++, addr);
  62. }
  63. static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
  64. {
  65. uint8_t *buf = (uint8_t *)data;
  66. while(bytelen--)
  67. *buf++ = __arch_getb(addr);
  68. }
  69. static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
  70. {
  71. uint16_t *buf = (uint16_t *)data;
  72. while(wordlen--)
  73. *buf++ = __arch_getw(addr);
  74. }
  75. static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
  76. {
  77. uint32_t *buf = (uint32_t *)data;
  78. while(longlen--)
  79. *buf++ = __arch_getl(addr);
  80. }
  81. #define __raw_writeb(v,a) __arch_putb(v,a)
  82. #define __raw_writew(v,a) __arch_putw(v,a)
  83. #define __raw_writel(v,a) __arch_putl(v,a)
  84. #define __raw_writeq(v,a) __arch_putq(v,a)
  85. #define __raw_readb(a) __arch_getb(a)
  86. #define __raw_readw(a) __arch_getw(a)
  87. #define __raw_readl(a) __arch_getl(a)
  88. #define __raw_readq(a) __arch_getq(a)
  89. /*
  90. * TODO: The kernel offers some more advanced versions of barriers, it might
  91. * have some advantages to use them instead of the simple one here.
  92. */
  93. #define mb() dsb()
  94. #define __iormb() dmb()
  95. #define __iowmb() dmb()
  96. #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
  97. #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
  98. #define writel(v,c) ({ u32 __v = (u32)v; __iowmb(); __arch_putl(__v,c); __v; })
  99. #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
  100. #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
  101. #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
  102. #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
  103. #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
  104. /*
  105. * The compiler seems to be incapable of optimising constants
  106. * properly. Spell it out to the compiler in some cases.
  107. * These are only valid for small values of "off" (< 1<<12)
  108. */
  109. #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
  110. #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
  111. #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
  112. #define __raw_base_readb(base,off) __arch_base_getb(base,off)
  113. #define __raw_base_readw(base,off) __arch_base_getw(base,off)
  114. #define __raw_base_readl(base,off) __arch_base_getl(base,off)
  115. /*
  116. * Clear and set bits in one shot. These macros can be used to clear and
  117. * set multiple bits in a register using a single call. These macros can
  118. * also be used to set a multiple-bit bit pattern using a mask, by
  119. * specifying the mask in the 'clear' parameter and the new bit pattern
  120. * in the 'set' parameter.
  121. */
  122. #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a)
  123. #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
  124. #define out_le64(a,v) out_arch(q,le64,a,v)
  125. #define out_le32(a,v) out_arch(l,le32,a,v)
  126. #define out_le16(a,v) out_arch(w,le16,a,v)
  127. #define in_le64(a) in_arch(q,le64,a)
  128. #define in_le32(a) in_arch(l,le32,a)
  129. #define in_le16(a) in_arch(w,le16,a)
  130. #define out_be32(a,v) out_arch(l,be32,a,v)
  131. #define out_be16(a,v) out_arch(w,be16,a,v)
  132. #define in_be32(a) in_arch(l,be32,a)
  133. #define in_be16(a) in_arch(w,be16,a)
  134. #define out_32(a,v) __raw_writel(v,a)
  135. #define out_16(a,v) __raw_writew(v,a)
  136. #define out_8(a,v) __raw_writeb(v,a)
  137. #define in_32(a) __raw_readl(a)
  138. #define in_16(a) __raw_readw(a)
  139. #define in_8(a) __raw_readb(a)
  140. #define clrbits(type, addr, clear) \
  141. out_##type((addr), in_##type(addr) & ~(clear))
  142. #define setbits(type, addr, set) \
  143. out_##type((addr), in_##type(addr) | (set))
  144. #define clrsetbits(type, addr, clear, set) \
  145. out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
  146. #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
  147. #define setbits_be32(addr, set) setbits(be32, addr, set)
  148. #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
  149. #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
  150. #define setbits_le32(addr, set) setbits(le32, addr, set)
  151. #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
  152. #define clrbits_32(addr, clear) clrbits(32, addr, clear)
  153. #define setbits_32(addr, set) setbits(32, addr, set)
  154. #define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
  155. #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
  156. #define setbits_be16(addr, set) setbits(be16, addr, set)
  157. #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
  158. #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
  159. #define setbits_le16(addr, set) setbits(le16, addr, set)
  160. #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
  161. #define clrbits_16(addr, clear) clrbits(16, addr, clear)
  162. #define setbits_16(addr, set) setbits(16, addr, set)
  163. #define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
  164. #define clrbits_8(addr, clear) clrbits(8, addr, clear)
  165. #define setbits_8(addr, set) setbits(8, addr, set)
  166. #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
  167. /*
  168. * Now, pick up the machine-defined IO definitions
  169. */
  170. /*
  171. * IO port access primitives
  172. * -------------------------
  173. *
  174. * The ARM doesn't have special IO access instructions; all IO is memory
  175. * mapped. Note that these are defined to perform little endian accesses
  176. * only. Their primary purpose is to access PCI and ISA peripherals.
  177. *
  178. * Note that for a big endian machine, this implies that the following
  179. * big endian mode connectivity is in place, as described by numerous
  180. * ARM documents:
  181. *
  182. * PCI: D0-D7 D8-D15 D16-D23 D24-D31
  183. * ARM: D24-D31 D16-D23 D8-D15 D0-D7
  184. *
  185. * The machine specific io.h include defines __io to translate an "IO"
  186. * address to a memory address.
  187. *
  188. * Note that we prevent GCC re-ordering or caching values in expressions
  189. * by introducing sequence points into the in*() definitions. Note that
  190. * __raw_* do not guarantee this behaviour.
  191. *
  192. * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  193. */
  194. #ifdef __io
  195. #define outb(v,p) __raw_writeb(v,__io(p))
  196. #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
  197. #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
  198. #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
  199. #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
  200. #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
  201. #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
  202. #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
  203. #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
  204. #define insb(p,d,l) __raw_readsb(__io(p),d,l)
  205. #define insw(p,d,l) __raw_readsw(__io(p),d,l)
  206. #define insl(p,d,l) __raw_readsl(__io(p),d,l)
  207. #endif
  208. #define outb_p(val,port) outb((val),(port))
  209. #define outw_p(val,port) outw((val),(port))
  210. #define outl_p(val,port) outl((val),(port))
  211. #define inb_p(port) inb((port))
  212. #define inw_p(port) inw((port))
  213. #define inl_p(port) inl((port))
  214. #define outsb_p(port,from,len) outsb(port,from,len)
  215. #define outsw_p(port,from,len) outsw(port,from,len)
  216. #define outsl_p(port,from,len) outsl(port,from,len)
  217. #define insb_p(port,to,len) insb(port,to,len)
  218. #define insw_p(port,to,len) insw(port,to,len)
  219. #define insl_p(port,to,len) insl(port,to,len)
  220. #define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
  221. #define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
  222. #define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
  223. #define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
  224. #define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
  225. #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
  226. /*
  227. * DMA-consistent mapping functions. These allocate/free a region of
  228. * uncached, unwrite-buffered mapped memory space for use with DMA
  229. * devices. This is the "generic" version. The PCI specific version
  230. * is in pci.h
  231. */
  232. //extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
  233. //extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
  234. //extern void consistent_sync(void *vaddr, size_t size, int rw);
  235. /*
  236. * String version of IO memory access ops:
  237. */
  238. extern void _memcpy_fromio(void *, unsigned long, size_t);
  239. extern void _memcpy_toio(unsigned long, const void *, size_t);
  240. extern void _memset_io(unsigned long, int, size_t);
  241. extern void __readwrite_bug(const char *fn);
  242. /*
  243. * If this architecture has PCI memory IO, then define the read/write
  244. * macros. These should only be used with the cookie passed from
  245. * ioremap.
  246. */
  247. #define memset_io(a, b, c) memset((void *)(a), (b), (c))
  248. #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
  249. #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
  250. #define isa_check_signature(io,sig,len) (0)
  251. #include "io-generic.h"
  252. #endif /* __ASM_ARM_IO_H */