Firmware for MNT ZZ9000 graphics and ARM coprocessor card for Amiga computers.
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zz9000_project.tcl 74KB

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  1. #*****************************************************************************************
  2. # Vivado (TM) v2018.3 (64-bit)
  3. #
  4. # zz9000_project.tcl: Tcl script for re-creating project 'ZZ9000_proto'
  5. #
  6. # Generated by Vivado on Thu Sep 12 17:01:16 CEST 2019
  7. # IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018
  8. #
  9. # This file contains the Vivado Tcl commands for re-creating the project to the state*
  10. # when this script was generated. In order to re-create the project, please source this
  11. # file in the Vivado Tcl Shell.
  12. #
  13. # * Note that the runs in the created project will be configured the same way as the
  14. # original project, however they will not be launched automatically. To regenerate the
  15. # run results please launch the synthesis/implementation runs as needed.
  16. #
  17. #*****************************************************************************************
  18. # NOTE: In order to use this script for source control purposes, please make sure that the
  19. # following files are added to the source control system:-
  20. #
  21. # 1. This project restoration tcl script (zz9000_project.tcl) that was generated.
  22. #
  23. # 2. The following source(s) files that were local or imported into the original project.
  24. # (Please see the '$orig_proj_dir' and '$origin_dir' variable setting below at the start of the script)
  25. #
  26. # "/home/mntmn/code/ZZ9000_proto/mntzorro.v"
  27. # "/home/mntmn/code/ZZ9000_proto/video_formatter.v"
  28. # "/home/mntmn/code/ZZ9000_proto/ZZ9000_proto.srcs/sources_1/bd/zz9000_ps/hdl/zz9000_ps_wrapper.v"
  29. # "/home/mntmn/code/ZZ9000_proto/ZZ9000_proto.srcs/constrs_1/new/zz9000.xdc"
  30. # "/home/mntmn/code/ZZ9000_proto/zz9000_ps_wrapper_func_synth.wcfg"
  31. #
  32. # 3. The following remote source files that were added to the original project:-
  33. #
  34. # <none>
  35. #
  36. #*****************************************************************************************
  37. # Set the reference directory for source file relative paths (by default the value is script directory path)
  38. set origin_dir "."
  39. # Use origin directory path location variable, if specified in the tcl shell
  40. if { [info exists ::origin_dir_loc] } {
  41. set origin_dir $::origin_dir_loc
  42. }
  43. # Set the project name
  44. set _xil_proj_name_ "ZZ9000_proto"
  45. # Use project name variable, if specified in the tcl shell
  46. if { [info exists ::user_project_name] } {
  47. set _xil_proj_name_ $::user_project_name
  48. }
  49. variable script_file
  50. set script_file "zz9000_project.tcl"
  51. # Help information for this script
  52. proc print_help {} {
  53. variable script_file
  54. puts "\nDescription:"
  55. puts "Recreate a Vivado project from this script. The created project will be"
  56. puts "functionally equivalent to the original project for which this script was"
  57. puts "generated. The script contains commands for creating a project, filesets,"
  58. puts "runs, adding/importing sources and setting properties on various objects.\n"
  59. puts "Syntax:"
  60. puts "$script_file"
  61. puts "$script_file -tclargs \[--origin_dir <path>\]"
  62. puts "$script_file -tclargs \[--project_name <name>\]"
  63. puts "$script_file -tclargs \[--help\]\n"
  64. puts "Usage:"
  65. puts "Name Description"
  66. puts "-------------------------------------------------------------------------"
  67. puts "\[--origin_dir <path>\] Determine source file paths wrt this path. Default"
  68. puts " origin_dir path value is \".\", otherwise, the value"
  69. puts " that was set with the \"-paths_relative_to\" switch"
  70. puts " when this script was generated.\n"
  71. puts "\[--project_name <name>\] Create project with the specified name. Default"
  72. puts " name is the name of the project from where this"
  73. puts " script was generated.\n"
  74. puts "\[--help\] Print help information for this script"
  75. puts "-------------------------------------------------------------------------\n"
  76. exit 0
  77. }
  78. if { $::argc > 0 } {
  79. for {set i 0} {$i < $::argc} {incr i} {
  80. set option [string trim [lindex $::argv $i]]
  81. switch -regexp -- $option {
  82. "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] }
  83. "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] }
  84. "--help" { print_help }
  85. default {
  86. if { [regexp {^-} $option] } {
  87. puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n"
  88. return 1
  89. }
  90. }
  91. }
  92. }
  93. }
  94. # Set the directory path for the original project from where this script was exported
  95. set orig_proj_dir "[file normalize "$origin_dir/"]"
  96. # Create project
  97. create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7z020clg400-1
  98. # Set the directory path for the new project
  99. set proj_dir [get_property directory [current_project]]
  100. # Set project properties
  101. set obj [current_project]
  102. set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
  103. set_property -name "dsa.accelerator_binary_content" -value "bitstream" -objects $obj
  104. set_property -name "dsa.accelerator_binary_format" -value "xclbin2" -objects $obj
  105. set_property -name "dsa.description" -value "Vivado generated DSA" -objects $obj
  106. set_property -name "dsa.dr_bd_base_address" -value "0" -objects $obj
  107. set_property -name "dsa.emu_dir" -value "emu" -objects $obj
  108. set_property -name "dsa.flash_interface_type" -value "bpix16" -objects $obj
  109. set_property -name "dsa.flash_offset_address" -value "0" -objects $obj
  110. set_property -name "dsa.flash_size" -value "1024" -objects $obj
  111. set_property -name "dsa.host_architecture" -value "x86_64" -objects $obj
  112. set_property -name "dsa.host_interface" -value "pcie" -objects $obj
  113. set_property -name "dsa.platform_state" -value "pre_synth" -objects $obj
  114. set_property -name "dsa.vendor" -value "xilinx" -objects $obj
  115. set_property -name "dsa.version" -value "0.0" -objects $obj
  116. set_property -name "enable_vhdl_2008" -value "1" -objects $obj
  117. set_property -name "ip_cache_permissions" -value "read write" -objects $obj
  118. set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj
  119. set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj
  120. set_property -name "part" -value "xc7z020clg400-1" -objects $obj
  121. set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj
  122. set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj
  123. set_property -name "simulator_language" -value "Mixed" -objects $obj
  124. set_property -name "webtalk.activehdl_export_sim" -value "21" -objects $obj
  125. set_property -name "webtalk.ies_export_sim" -value "21" -objects $obj
  126. set_property -name "webtalk.modelsim_export_sim" -value "21" -objects $obj
  127. set_property -name "webtalk.questa_export_sim" -value "21" -objects $obj
  128. set_property -name "webtalk.riviera_export_sim" -value "21" -objects $obj
  129. set_property -name "webtalk.vcs_export_sim" -value "21" -objects $obj
  130. set_property -name "webtalk.xsim_export_sim" -value "21" -objects $obj
  131. set_property -name "webtalk.xsim_launch_sim" -value "38" -objects $obj
  132. set_property -name "xpm_libraries" -value "XPM_CDC XPM_FIFO XPM_MEMORY" -objects $obj
  133. # Create 'sources_1' fileset (if not found)
  134. if {[string equal [get_filesets -quiet sources_1] ""]} {
  135. create_fileset -srcset sources_1
  136. }
  137. # Set IP repository paths
  138. set obj [get_filesets sources_1]
  139. set_property "ip_repo_paths" "[file normalize "$origin_dir/../ip_repo/MNTZorro_1.0"]" $obj
  140. # Rebuild user ip_repo's index before adding any source files
  141. update_ip_catalog -rebuild
  142. # Set 'sources_1' fileset object
  143. set obj [get_filesets sources_1]
  144. # Import local files from the original project
  145. set files [list \
  146. [file normalize "${origin_dir}/mntzorro.v" ]\
  147. [file normalize "${origin_dir}/video_formatter.v" ]\
  148. [file normalize "${origin_dir}/ZZ9000_proto.srcs/sources_1/bd/zz9000_ps/hdl/zz9000_ps_wrapper.v" ]\
  149. ]
  150. set imported_files [import_files -fileset sources_1 $files]
  151. # Set 'sources_1' fileset file properties for remote files
  152. # None
  153. # Set 'sources_1' fileset file properties for local files
  154. set file "mntzorro.v"
  155. set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
  156. set_property -name "path_mode" -value "RelativeOnly" -objects $file_obj
  157. # Set 'sources_1' fileset properties
  158. set obj [get_filesets sources_1]
  159. set_property -name "top" -value "zz9000_ps_wrapper" -objects $obj
  160. # Create 'constrs_1' fileset (if not found)
  161. if {[string equal [get_filesets -quiet constrs_1] ""]} {
  162. create_fileset -constrset constrs_1
  163. }
  164. # Set 'constrs_1' fileset object
  165. set obj [get_filesets constrs_1]
  166. # Add/Import constrs file and set constrs file properties
  167. set file "[file normalize "$origin_dir/ZZ9000_proto.srcs/constrs_1/new/zz9000.xdc"]"
  168. set file_imported [import_files -fileset constrs_1 [list $file]]
  169. set file "new/zz9000.xdc"
  170. set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
  171. set_property -name "file_type" -value "XDC" -objects $file_obj
  172. # Set 'constrs_1' fileset properties
  173. set obj [get_filesets constrs_1]
  174. set_property -name "target_constrs_file" -value "[get_files *new/zz9000.xdc]" -objects $obj
  175. set_property -name "target_part" -value "xc7z020clg400-1" -objects $obj
  176. set_property -name "target_ucf" -value "[get_files *new/zz9000.xdc]" -objects $obj
  177. # Create 'sim_1' fileset (if not found)
  178. if {[string equal [get_filesets -quiet sim_1] ""]} {
  179. create_fileset -simset sim_1
  180. }
  181. # Set 'sim_1' fileset object
  182. set obj [get_filesets sim_1]
  183. # Import local files from the original project
  184. # Set 'sim_1' fileset file properties for remote files
  185. # None
  186. # Set 'sim_1' fileset file properties for local files
  187. # None
  188. # Set 'sim_1' fileset properties
  189. set obj [get_filesets sim_1]
  190. set_property -name "nl.mode" -value "funcsim" -objects $obj
  191. set_property -name "sim_mode" -value "post-synthesis" -objects $obj
  192. set_property -name "top" -value "zz9000_ps_wrapper" -objects $obj
  193. set_property -name "top_lib" -value "xil_defaultlib" -objects $obj
  194. set_property -name "xsim.elaborate.mt_level" -value "off" -objects $obj
  195. set_property -name "xsim.elaborate.xelab.more_options" -value "-v 1" -objects $obj
  196. # Set 'utils_1' fileset object
  197. set obj [get_filesets utils_1]
  198. # Empty (no sources present)
  199. # Set 'utils_1' fileset properties
  200. set obj [get_filesets utils_1]
  201. # Adding sources referenced in BDs, if not already added
  202. if { [get_files mntzorro.v] == "" } {
  203. import_files -quiet -fileset sources_1 mntzorro.v
  204. }
  205. if { [get_files video_formatter.v] == "" } {
  206. import_files -quiet -fileset sources_1 video_formatter.v
  207. }
  208. # Proc to create BD zz9000_ps
  209. proc cr_bd_zz9000_ps { parentCell } {
  210. # The design that will be created by this Tcl proc contains the following
  211. # module references:
  212. # MNTZorro_v0_1_S00_AXI, video_formatter
  213. # CHANGE DESIGN NAME HERE
  214. set design_name zz9000_ps
  215. common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..."
  216. create_bd_design $design_name
  217. set bCheckIPsPassed 1
  218. ##################################################################
  219. # CHECK IPs
  220. ##################################################################
  221. set bCheckIPs 1
  222. if { $bCheckIPs == 1 } {
  223. set list_check_ips "\
  224. xilinx.com:ip:axi_protocol_converter:2.1\
  225. xilinx.com:ip:axi_register_slice:2.1\
  226. xilinx.com:ip:clk_wiz:6.0\
  227. xilinx.com:ip:proc_sys_reset:5.0\
  228. xilinx.com:ip:processing_system7:5.5\
  229. xilinx.com:ip:xlslice:1.0\
  230. xilinx.com:ip:axi_vdma:6.3\
  231. xilinx.com:ip:axis_data_fifo:2.0\
  232. "
  233. set list_ips_missing ""
  234. common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ."
  235. foreach ip_vlnv $list_check_ips {
  236. set ip_obj [get_ipdefs -all $ip_vlnv]
  237. if { $ip_obj eq "" } {
  238. lappend list_ips_missing $ip_vlnv
  239. }
  240. }
  241. if { $list_ips_missing ne "" } {
  242. catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." }
  243. set bCheckIPsPassed 0
  244. }
  245. }
  246. ##################################################################
  247. # CHECK Modules
  248. ##################################################################
  249. set bCheckModules 1
  250. if { $bCheckModules == 1 } {
  251. set list_check_mods "\
  252. MNTZorro_v0_1_S00_AXI\
  253. video_formatter\
  254. "
  255. set list_mods_missing ""
  256. common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ."
  257. foreach mod_vlnv $list_check_mods {
  258. if { [can_resolve_reference $mod_vlnv] == 0 } {
  259. lappend list_mods_missing $mod_vlnv
  260. }
  261. }
  262. if { $list_mods_missing ne "" } {
  263. catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" }
  264. common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above."
  265. set bCheckIPsPassed 0
  266. }
  267. }
  268. if { $bCheckIPsPassed != 1 } {
  269. common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above."
  270. return 3
  271. }
  272. # Hierarchical cell: video
  273. proc create_hier_cell_video { parentCell nameHier } {
  274. variable script_folder
  275. if { $parentCell eq "" || $nameHier eq "" } {
  276. catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_video() - Empty argument(s)!"}
  277. return
  278. }
  279. # Get object for parentCell
  280. set parentObj [get_bd_cells $parentCell]
  281. if { $parentObj == "" } {
  282. catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"}
  283. return
  284. }
  285. # Make sure parentObj is hier blk
  286. set parentType [get_property TYPE $parentObj]
  287. if { $parentType ne "hier" } {
  288. catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
  289. return
  290. }
  291. # Save current instance; Restore later
  292. set oldCurInst [current_bd_instance .]
  293. # Set parent object as current
  294. current_bd_instance $parentObj
  295. # Create cell and set as current instance
  296. set hier_obj [create_bd_cell -type hier $nameHier]
  297. current_bd_instance $hier_obj
  298. # Create interface pins
  299. create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 M_AXI_MM2S
  300. create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 S_AXI_LITE
  301. # Create pins
  302. create_bd_pin -dir O VGA_DE
  303. create_bd_pin -dir O VGA_HS
  304. create_bd_pin -dir I -type clk VGA_PCLK
  305. create_bd_pin -dir O VGA_VS
  306. create_bd_pin -dir I -type rst aresetn
  307. create_bd_pin -dir I -type rst axi_resetn
  308. create_bd_pin -dir I -from 31 -to 0 control_data
  309. create_bd_pin -dir I control_interlace
  310. create_bd_pin -dir I -from 7 -to 0 control_op
  311. create_bd_pin -dir O -from 31 -to 0 dvi_rgb
  312. create_bd_pin -dir I -type clk m_axi_mm2s_aclk
  313. create_bd_pin -dir I -type clk s_axi_lite_aclk
  314. # Create instance: axi_vdma_0, and set properties
  315. set axi_vdma_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_vdma:6.3 axi_vdma_0 ]
  316. set_property -dict [ list \
  317. CONFIG.c_include_mm2s_dre {0} \
  318. CONFIG.c_include_s2mm {0} \
  319. CONFIG.c_m_axi_mm2s_data_width {32} \
  320. CONFIG.c_mm2s_genlock_mode {0} \
  321. CONFIG.c_mm2s_linebuffer_depth {2048} \
  322. CONFIG.c_mm2s_max_burst_length {128} \
  323. CONFIG.c_num_fstores {1} \
  324. CONFIG.c_s2mm_genlock_mode {0} \
  325. ] $axi_vdma_0
  326. # Create instance: axis_data_fifo_0, and set properties
  327. set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ]
  328. set_property -dict [ list \
  329. CONFIG.FIFO_DEPTH {32} \
  330. ] $axis_data_fifo_0
  331. # Create instance: video_formatter_0, and set properties
  332. set block_name video_formatter
  333. set block_cell_name video_formatter_0
  334. if { [catch {set video_formatter_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } {
  335. catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."}
  336. return 1
  337. } elseif { $video_formatter_0 eq "" } {
  338. catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."}
  339. return 1
  340. }
  341. # Create interface connections
  342. connect_bd_intf_net -intf_net axi_vdma_0_M_AXIS_MM2S [get_bd_intf_pins axi_vdma_0/M_AXIS_MM2S] [get_bd_intf_pins axis_data_fifo_0/S_AXIS]
  343. connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins video_formatter_0/m_axis_vid]
  344. connect_bd_intf_net -intf_net ps7_0_axi_periph_M01_AXI [get_bd_intf_pins S_AXI_LITE] [get_bd_intf_pins axi_vdma_0/S_AXI_LITE]
  345. connect_bd_intf_net -intf_net video_subsystem_M_AXI_MM2S [get_bd_intf_pins M_AXI_MM2S] [get_bd_intf_pins axi_vdma_0/M_AXI_MM2S]
  346. # Create port connections
  347. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_data [get_bd_pins control_data] [get_bd_pins video_formatter_0/control_data]
  348. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_interlace [get_bd_pins control_interlace] [get_bd_pins video_formatter_0/control_interlace]
  349. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_op [get_bd_pins control_op] [get_bd_pins video_formatter_0/control_op]
  350. connect_bd_net -net clk_1 [get_bd_pins VGA_PCLK] [get_bd_pins video_formatter_0/dvi_clk]
  351. connect_bd_net -net proc_sys_reset_1_peripheral_aresetn [get_bd_pins aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins video_formatter_0/aresetn]
  352. connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins m_axi_mm2s_aclk] [get_bd_pins axi_vdma_0/m_axi_mm2s_aclk] [get_bd_pins axi_vdma_0/m_axis_mm2s_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins video_formatter_0/m_axis_vid_aclk]
  353. connect_bd_net -net processing_system7_0_FCLK_CLK1 [get_bd_pins s_axi_lite_aclk] [get_bd_pins axi_vdma_0/s_axi_lite_aclk]
  354. connect_bd_net -net rst_ps7_0_25M_peripheral_aresetn [get_bd_pins axi_resetn] [get_bd_pins axi_vdma_0/axi_resetn]
  355. connect_bd_net -net v_axi4s_vid_out_0_vid_data [get_bd_pins dvi_rgb] [get_bd_pins video_formatter_0/dvi_rgb]
  356. connect_bd_net -net video_subsystem_VGA_DE [get_bd_pins VGA_DE] [get_bd_pins video_formatter_0/dvi_active_video]
  357. connect_bd_net -net video_subsystem_VGA_HS [get_bd_pins VGA_HS] [get_bd_pins video_formatter_0/dvi_hsync]
  358. connect_bd_net -net video_subsystem_VGA_VS [get_bd_pins VGA_VS] [get_bd_pins video_formatter_0/dvi_vsync]
  359. # Restore current instance
  360. current_bd_instance $oldCurInst
  361. }
  362. variable script_folder
  363. if { $parentCell eq "" } {
  364. set parentCell [get_bd_cells /]
  365. }
  366. # Get object for parentCell
  367. set parentObj [get_bd_cells $parentCell]
  368. if { $parentObj == "" } {
  369. catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"}
  370. return
  371. }
  372. # Make sure parentObj is hier blk
  373. set parentType [get_property TYPE $parentObj]
  374. if { $parentType ne "hier" } {
  375. catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
  376. return
  377. }
  378. # Save current instance; Restore later
  379. set oldCurInst [current_bd_instance .]
  380. # Set parent object as current
  381. current_bd_instance $parentObj
  382. # Create interface ports
  383. set DDR [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR ]
  384. set FIXED_IO [ create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 FIXED_IO ]
  385. # Create ports
  386. set VCAP_B0 [ create_bd_port -dir I VCAP_B0 ]
  387. set VCAP_B1 [ create_bd_port -dir I VCAP_B1 ]
  388. set VCAP_B2 [ create_bd_port -dir I VCAP_B2 ]
  389. set VCAP_B3 [ create_bd_port -dir I VCAP_B3 ]
  390. set VCAP_B4 [ create_bd_port -dir I VCAP_B4 ]
  391. set VCAP_B5 [ create_bd_port -dir I VCAP_B5 ]
  392. set VCAP_B6 [ create_bd_port -dir I VCAP_B6 ]
  393. set VCAP_B7 [ create_bd_port -dir I VCAP_B7 ]
  394. set VCAP_G0 [ create_bd_port -dir I VCAP_G0 ]
  395. set VCAP_G1 [ create_bd_port -dir I VCAP_G1 ]
  396. set VCAP_G2 [ create_bd_port -dir I VCAP_G2 ]
  397. set VCAP_G3 [ create_bd_port -dir I VCAP_G3 ]
  398. set VCAP_G4 [ create_bd_port -dir I VCAP_G4 ]
  399. set VCAP_G5 [ create_bd_port -dir I VCAP_G5 ]
  400. set VCAP_G6 [ create_bd_port -dir I VCAP_G6 ]
  401. set VCAP_G7 [ create_bd_port -dir I VCAP_G7 ]
  402. set VCAP_HSYNC [ create_bd_port -dir I VCAP_HSYNC ]
  403. set VCAP_R0 [ create_bd_port -dir I VCAP_R0 ]
  404. set VCAP_R1 [ create_bd_port -dir I VCAP_R1 ]
  405. set VCAP_R2 [ create_bd_port -dir I VCAP_R2 ]
  406. set VCAP_R3 [ create_bd_port -dir I VCAP_R3 ]
  407. set VCAP_R4 [ create_bd_port -dir I VCAP_R4 ]
  408. set VCAP_R5 [ create_bd_port -dir I VCAP_R5 ]
  409. set VCAP_R6 [ create_bd_port -dir I VCAP_R6 ]
  410. set VCAP_R7 [ create_bd_port -dir I VCAP_R7 ]
  411. set VCAP_VSYNC [ create_bd_port -dir I VCAP_VSYNC ]
  412. set VGA_B [ create_bd_port -dir O -from 7 -to 0 VGA_B ]
  413. set VGA_DE [ create_bd_port -dir O VGA_DE ]
  414. set VGA_G [ create_bd_port -dir O -from 7 -to 0 VGA_G ]
  415. set VGA_HS [ create_bd_port -dir O VGA_HS ]
  416. set VGA_PCLK [ create_bd_port -dir O -type clk VGA_PCLK ]
  417. set VGA_R [ create_bd_port -dir O -from 7 -to 0 VGA_R ]
  418. set VGA_VS [ create_bd_port -dir O VGA_VS ]
  419. set ZORRO_ADDR [ create_bd_port -dir IO -from 22 -to 0 ZORRO_ADDR ]
  420. set ZORRO_ADDRDIR [ create_bd_port -dir O ZORRO_ADDRDIR ]
  421. set ZORRO_ADDRDIR2 [ create_bd_port -dir O ZORRO_ADDRDIR2 ]
  422. set ZORRO_C28D [ create_bd_port -dir I ZORRO_C28D ]
  423. set ZORRO_DATA [ create_bd_port -dir IO -from 15 -to 0 ZORRO_DATA ]
  424. set ZORRO_DATADIR [ create_bd_port -dir O ZORRO_DATADIR ]
  425. set ZORRO_DOE [ create_bd_port -dir I ZORRO_DOE ]
  426. set ZORRO_E7M [ create_bd_port -dir I ZORRO_E7M ]
  427. set ZORRO_INT6 [ create_bd_port -dir O ZORRO_INT6 ]
  428. set ZORRO_NBGN [ create_bd_port -dir I ZORRO_NBGN ]
  429. set ZORRO_NBRN [ create_bd_port -dir O ZORRO_NBRN ]
  430. set ZORRO_NCCS [ create_bd_port -dir I ZORRO_NCCS ]
  431. set ZORRO_NCFGIN [ create_bd_port -dir I ZORRO_NCFGIN ]
  432. set ZORRO_NCFGOUT [ create_bd_port -dir O ZORRO_NCFGOUT ]
  433. set ZORRO_NCINH [ create_bd_port -dir O ZORRO_NCINH ]
  434. set ZORRO_NDS0 [ create_bd_port -dir I ZORRO_NDS0 ]
  435. set ZORRO_NDS1 [ create_bd_port -dir I ZORRO_NDS1 ]
  436. set ZORRO_NDTACK [ create_bd_port -dir O ZORRO_NDTACK ]
  437. set ZORRO_NFCS [ create_bd_port -dir I ZORRO_NFCS ]
  438. set ZORRO_NIORST [ create_bd_port -dir I ZORRO_NIORST ]
  439. set ZORRO_NLDS [ create_bd_port -dir I ZORRO_NLDS ]
  440. set ZORRO_NSLAVE [ create_bd_port -dir O ZORRO_NSLAVE ]
  441. set ZORRO_NUDS [ create_bd_port -dir I ZORRO_NUDS ]
  442. set ZORRO_READ [ create_bd_port -dir I ZORRO_READ ]
  443. # Create instance: MNTZorro_v0_1_S00_AXI_0, and set properties
  444. set block_name MNTZorro_v0_1_S00_AXI
  445. set block_cell_name MNTZorro_v0_1_S00_AXI_0
  446. if { [catch {set MNTZorro_v0_1_S00_AXI_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } {
  447. catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."}
  448. return 1
  449. } elseif { $MNTZorro_v0_1_S00_AXI_0 eq "" } {
  450. catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."}
  451. return 1
  452. }
  453. # Create instance: axi_protocol_convert_0, and set properties
  454. set axi_protocol_convert_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_protocol_converter:2.1 axi_protocol_convert_0 ]
  455. # Create instance: axi_protocol_convert_1, and set properties
  456. set axi_protocol_convert_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_protocol_converter:2.1 axi_protocol_convert_1 ]
  457. set_property -dict [ list \
  458. CONFIG.TRANSLATION_MODE {2} \
  459. ] $axi_protocol_convert_1
  460. # Create instance: axi_protocol_convert_2, and set properties
  461. set axi_protocol_convert_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_protocol_converter:2.1 axi_protocol_convert_2 ]
  462. # Create instance: axi_register_slice_0, and set properties
  463. set axi_register_slice_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 axi_register_slice_0 ]
  464. # Create instance: axi_register_slice_1, and set properties
  465. set axi_register_slice_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 axi_register_slice_1 ]
  466. # Create instance: axi_register_slice_2, and set properties
  467. set axi_register_slice_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 axi_register_slice_2 ]
  468. # Create instance: axi_register_slice_3, and set properties
  469. set axi_register_slice_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 axi_register_slice_3 ]
  470. # Create instance: clk_wiz_0, and set properties
  471. set clk_wiz_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0 ]
  472. set_property -dict [ list \
  473. CONFIG.CLKOUT1_DRIVES {BUFG} \
  474. CONFIG.CLKOUT1_JITTER {272.433} \
  475. CONFIG.CLKOUT1_PHASE_ERROR {261.747} \
  476. CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {75} \
  477. CONFIG.CLKOUT2_DRIVES {BUFG} \
  478. CONFIG.CLKOUT3_DRIVES {BUFG} \
  479. CONFIG.CLKOUT4_DRIVES {BUFG} \
  480. CONFIG.CLKOUT5_DRIVES {BUFG} \
  481. CONFIG.CLKOUT6_DRIVES {BUFG} \
  482. CONFIG.CLKOUT7_DRIVES {BUFG} \
  483. CONFIG.MMCM_CLKFBOUT_MULT_F {33} \
  484. CONFIG.MMCM_CLKOUT0_DIVIDE_F {11} \
  485. CONFIG.MMCM_COMPENSATION {ZHOLD} \
  486. CONFIG.MMCM_DIVCLK_DIVIDE {4} \
  487. CONFIG.PRIMITIVE {PLL} \
  488. CONFIG.PRIM_SOURCE {Single_ended_clock_capable_pin} \
  489. CONFIG.SECONDARY_SOURCE {Single_ended_clock_capable_pin} \
  490. CONFIG.USE_DYN_RECONFIG {true} \
  491. CONFIG.USE_PHASE_ALIGNMENT {false} \
  492. ] $clk_wiz_0
  493. # Create instance: proc_sys_reset_0, and set properties
  494. set proc_sys_reset_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_0 ]
  495. # Create instance: processing_system7_0, and set properties
  496. set processing_system7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 processing_system7_0 ]
  497. set_property -dict [ list \
  498. CONFIG.PCW_ACT_APU_PERIPHERAL_FREQMHZ {666.666687} \
  499. CONFIG.PCW_ACT_CAN_PERIPHERAL_FREQMHZ {10.000000} \
  500. CONFIG.PCW_ACT_DCI_PERIPHERAL_FREQMHZ {10.158730} \
  501. CONFIG.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ {125.000000} \
  502. CONFIG.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ {10.000000} \
  503. CONFIG.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ {100.000000} \
  504. CONFIG.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ {25.000000} \
  505. CONFIG.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ {10.000000} \
  506. CONFIG.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ {10.000000} \
  507. CONFIG.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ {200.000000} \
  508. CONFIG.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ {10.000000} \
  509. CONFIG.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ {25.000000} \
  510. CONFIG.PCW_ACT_SMC_PERIPHERAL_FREQMHZ {10.000000} \
  511. CONFIG.PCW_ACT_SPI_PERIPHERAL_FREQMHZ {10.000000} \
  512. CONFIG.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ {200.000000} \
  513. CONFIG.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ {111.111115} \
  514. CONFIG.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ {111.111115} \
  515. CONFIG.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ {111.111115} \
  516. CONFIG.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ {111.111115} \
  517. CONFIG.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ {111.111115} \
  518. CONFIG.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ {111.111115} \
  519. CONFIG.PCW_ACT_UART_PERIPHERAL_FREQMHZ {100.000000} \
  520. CONFIG.PCW_ACT_WDT_PERIPHERAL_FREQMHZ {111.111115} \
  521. CONFIG.PCW_APU_CLK_RATIO_ENABLE {6:2:1} \
  522. CONFIG.PCW_APU_PERIPHERAL_FREQMHZ {666.666} \
  523. CONFIG.PCW_ARMPLL_CTRL_FBDIV {40} \
  524. CONFIG.PCW_CAN_PERIPHERAL_DIVISOR0 {1} \
  525. CONFIG.PCW_CAN_PERIPHERAL_DIVISOR1 {1} \
  526. CONFIG.PCW_CLK0_FREQ {100000000} \
  527. CONFIG.PCW_CLK1_FREQ {25000000} \
  528. CONFIG.PCW_CLK2_FREQ {10000000} \
  529. CONFIG.PCW_CLK3_FREQ {10000000} \
  530. CONFIG.PCW_CPU_CPU_6X4X_MAX_RANGE {667} \
  531. CONFIG.PCW_CPU_CPU_PLL_FREQMHZ {1333.333} \
  532. CONFIG.PCW_CPU_PERIPHERAL_CLKSRC {ARM PLL} \
  533. CONFIG.PCW_CPU_PERIPHERAL_DIVISOR0 {2} \
  534. CONFIG.PCW_DCI_PERIPHERAL_DIVISOR0 {15} \
  535. CONFIG.PCW_DCI_PERIPHERAL_DIVISOR1 {7} \
  536. CONFIG.PCW_DDRPLL_CTRL_FBDIV {32} \
  537. CONFIG.PCW_DDR_DDR_PLL_FREQMHZ {1066.667} \
  538. CONFIG.PCW_DDR_PERIPHERAL_DIVISOR0 {2} \
  539. CONFIG.PCW_DDR_RAM_HIGHADDR {0x3FFFFFFF} \
  540. CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27} \
  541. CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {1} \
  542. CONFIG.PCW_ENET0_GRP_MDIO_IO {MIO 52 .. 53} \
  543. CONFIG.PCW_ENET0_PERIPHERAL_CLKSRC {IO PLL} \
  544. CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR0 {8} \
  545. CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR1 {1} \
  546. CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {1} \
  547. CONFIG.PCW_ENET0_PERIPHERAL_FREQMHZ {1000 Mbps} \
  548. CONFIG.PCW_ENET0_RESET_ENABLE {0} \
  549. CONFIG.PCW_ENET1_GRP_MDIO_ENABLE {0} \
  550. CONFIG.PCW_ENET1_PERIPHERAL_CLKSRC {IO PLL} \
  551. CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR0 {1} \
  552. CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR1 {1} \
  553. CONFIG.PCW_ENET1_PERIPHERAL_ENABLE {0} \
  554. CONFIG.PCW_ENET1_PERIPHERAL_FREQMHZ {1000 Mbps} \
  555. CONFIG.PCW_ENET1_RESET_ENABLE {0} \
  556. CONFIG.PCW_ENET_RESET_ENABLE {0} \
  557. CONFIG.PCW_ENET_RESET_SELECT {<Select>} \
  558. CONFIG.PCW_EN_CLK0_PORT {1} \
  559. CONFIG.PCW_EN_CLK1_PORT {1} \
  560. CONFIG.PCW_EN_DDR {1} \
  561. CONFIG.PCW_EN_EMIO_CD_SDIO0 {0} \
  562. CONFIG.PCW_EN_EMIO_ENET0 {0} \
  563. CONFIG.PCW_EN_EMIO_ENET1 {0} \
  564. CONFIG.PCW_EN_EMIO_GPIO {0} \
  565. CONFIG.PCW_EN_EMIO_I2C0 {0} \
  566. CONFIG.PCW_EN_EMIO_TTC0 {0} \
  567. CONFIG.PCW_EN_EMIO_WDT {0} \
  568. CONFIG.PCW_EN_ENET0 {1} \
  569. CONFIG.PCW_EN_ENET1 {0} \
  570. CONFIG.PCW_EN_GPIO {1} \
  571. CONFIG.PCW_EN_I2C0 {1} \
  572. CONFIG.PCW_EN_RST0_PORT {1} \
  573. CONFIG.PCW_EN_RST1_PORT {0} \
  574. CONFIG.PCW_EN_SDIO0 {1} \
  575. CONFIG.PCW_EN_TTC0 {0} \
  576. CONFIG.PCW_EN_UART1 {1} \
  577. CONFIG.PCW_EN_WDT {0} \
  578. CONFIG.PCW_FCLK0_PERIPHERAL_CLKSRC {IO PLL} \
  579. CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR0 {5} \
  580. CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR1 {2} \
  581. CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR0 {8} \
  582. CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR1 {5} \
  583. CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR0 {1} \
  584. CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR1 {1} \
  585. CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR0 {1} \
  586. CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR1 {1} \
  587. CONFIG.PCW_FCLK_CLK0_BUF {FALSE} \
  588. CONFIG.PCW_FCLK_CLK1_BUF {TRUE} \
  589. CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100} \
  590. CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ {25} \
  591. CONFIG.PCW_FPGA_FCLK0_ENABLE {1} \
  592. CONFIG.PCW_FPGA_FCLK1_ENABLE {1} \
  593. CONFIG.PCW_FPGA_FCLK2_ENABLE {0} \
  594. CONFIG.PCW_FPGA_FCLK3_ENABLE {0} \
  595. CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {0} \
  596. CONFIG.PCW_GPIO_EMIO_GPIO_WIDTH {64} \
  597. CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} \
  598. CONFIG.PCW_GPIO_MIO_GPIO_IO {MIO} \
  599. CONFIG.PCW_I2C0_GRP_INT_ENABLE {0} \
  600. CONFIG.PCW_I2C0_GRP_INT_IO {<Select>} \
  601. CONFIG.PCW_I2C0_I2C0_IO {MIO 50 .. 51} \
  602. CONFIG.PCW_I2C0_PERIPHERAL_ENABLE {1} \
  603. CONFIG.PCW_I2C0_RESET_ENABLE {0} \
  604. CONFIG.PCW_I2C0_RESET_IO {<Select>} \
  605. CONFIG.PCW_I2C1_RESET_ENABLE {0} \
  606. CONFIG.PCW_I2C_PERIPHERAL_FREQMHZ {111.111115} \
  607. CONFIG.PCW_I2C_RESET_ENABLE {0} \
  608. CONFIG.PCW_I2C_RESET_SELECT {<Select>} \
  609. CONFIG.PCW_IOPLL_CTRL_FBDIV {30} \
  610. CONFIG.PCW_IO_IO_PLL_FREQMHZ {1000.000} \
  611. CONFIG.PCW_MIO_0_DIRECTION {inout} \
  612. CONFIG.PCW_MIO_0_IOTYPE {LVCMOS 3.3V} \
  613. CONFIG.PCW_MIO_0_PULLUP {enabled} \
  614. CONFIG.PCW_MIO_0_SLEW {slow} \
  615. CONFIG.PCW_MIO_10_DIRECTION {inout} \
  616. CONFIG.PCW_MIO_10_IOTYPE {LVCMOS 3.3V} \
  617. CONFIG.PCW_MIO_10_PULLUP {enabled} \
  618. CONFIG.PCW_MIO_10_SLEW {slow} \
  619. CONFIG.PCW_MIO_11_DIRECTION {inout} \
  620. CONFIG.PCW_MIO_11_IOTYPE {LVCMOS 3.3V} \
  621. CONFIG.PCW_MIO_11_PULLUP {enabled} \
  622. CONFIG.PCW_MIO_11_SLEW {slow} \
  623. CONFIG.PCW_MIO_12_DIRECTION {inout} \
  624. CONFIG.PCW_MIO_12_IOTYPE {LVCMOS 3.3V} \
  625. CONFIG.PCW_MIO_12_PULLUP {enabled} \
  626. CONFIG.PCW_MIO_12_SLEW {slow} \
  627. CONFIG.PCW_MIO_13_DIRECTION {inout} \
  628. CONFIG.PCW_MIO_13_IOTYPE {LVCMOS 3.3V} \
  629. CONFIG.PCW_MIO_13_PULLUP {enabled} \
  630. CONFIG.PCW_MIO_13_SLEW {slow} \
  631. CONFIG.PCW_MIO_14_DIRECTION {inout} \
  632. CONFIG.PCW_MIO_14_IOTYPE {LVCMOS 3.3V} \
  633. CONFIG.PCW_MIO_14_PULLUP {enabled} \
  634. CONFIG.PCW_MIO_14_SLEW {slow} \
  635. CONFIG.PCW_MIO_15_DIRECTION {inout} \
  636. CONFIG.PCW_MIO_15_IOTYPE {LVCMOS 3.3V} \
  637. CONFIG.PCW_MIO_15_PULLUP {enabled} \
  638. CONFIG.PCW_MIO_15_SLEW {slow} \
  639. CONFIG.PCW_MIO_16_DIRECTION {out} \
  640. CONFIG.PCW_MIO_16_IOTYPE {LVCMOS 1.8V} \
  641. CONFIG.PCW_MIO_16_PULLUP {enabled} \
  642. CONFIG.PCW_MIO_16_SLEW {slow} \
  643. CONFIG.PCW_MIO_17_DIRECTION {out} \
  644. CONFIG.PCW_MIO_17_IOTYPE {LVCMOS 1.8V} \
  645. CONFIG.PCW_MIO_17_PULLUP {enabled} \
  646. CONFIG.PCW_MIO_17_SLEW {slow} \
  647. CONFIG.PCW_MIO_18_DIRECTION {out} \
  648. CONFIG.PCW_MIO_18_IOTYPE {LVCMOS 1.8V} \
  649. CONFIG.PCW_MIO_18_PULLUP {enabled} \
  650. CONFIG.PCW_MIO_18_SLEW {slow} \
  651. CONFIG.PCW_MIO_19_DIRECTION {out} \
  652. CONFIG.PCW_MIO_19_IOTYPE {LVCMOS 1.8V} \
  653. CONFIG.PCW_MIO_19_PULLUP {enabled} \
  654. CONFIG.PCW_MIO_19_SLEW {slow} \
  655. CONFIG.PCW_MIO_1_DIRECTION {inout} \
  656. CONFIG.PCW_MIO_1_IOTYPE {LVCMOS 3.3V} \
  657. CONFIG.PCW_MIO_1_PULLUP {enabled} \
  658. CONFIG.PCW_MIO_1_SLEW {slow} \
  659. CONFIG.PCW_MIO_20_DIRECTION {out} \
  660. CONFIG.PCW_MIO_20_IOTYPE {LVCMOS 1.8V} \
  661. CONFIG.PCW_MIO_20_PULLUP {enabled} \
  662. CONFIG.PCW_MIO_20_SLEW {slow} \
  663. CONFIG.PCW_MIO_21_DIRECTION {out} \
  664. CONFIG.PCW_MIO_21_IOTYPE {LVCMOS 1.8V} \
  665. CONFIG.PCW_MIO_21_PULLUP {enabled} \
  666. CONFIG.PCW_MIO_21_SLEW {slow} \
  667. CONFIG.PCW_MIO_22_DIRECTION {in} \
  668. CONFIG.PCW_MIO_22_IOTYPE {LVCMOS 1.8V} \
  669. CONFIG.PCW_MIO_22_PULLUP {enabled} \
  670. CONFIG.PCW_MIO_22_SLEW {slow} \
  671. CONFIG.PCW_MIO_23_DIRECTION {in} \
  672. CONFIG.PCW_MIO_23_IOTYPE {LVCMOS 1.8V} \
  673. CONFIG.PCW_MIO_23_PULLUP {enabled} \
  674. CONFIG.PCW_MIO_23_SLEW {slow} \
  675. CONFIG.PCW_MIO_24_DIRECTION {in} \
  676. CONFIG.PCW_MIO_24_IOTYPE {LVCMOS 1.8V} \
  677. CONFIG.PCW_MIO_24_PULLUP {enabled} \
  678. CONFIG.PCW_MIO_24_SLEW {slow} \
  679. CONFIG.PCW_MIO_25_DIRECTION {in} \
  680. CONFIG.PCW_MIO_25_IOTYPE {LVCMOS 1.8V} \
  681. CONFIG.PCW_MIO_25_PULLUP {enabled} \
  682. CONFIG.PCW_MIO_25_SLEW {slow} \
  683. CONFIG.PCW_MIO_26_DIRECTION {in} \
  684. CONFIG.PCW_MIO_26_IOTYPE {LVCMOS 1.8V} \
  685. CONFIG.PCW_MIO_26_PULLUP {enabled} \
  686. CONFIG.PCW_MIO_26_SLEW {slow} \
  687. CONFIG.PCW_MIO_27_DIRECTION {in} \
  688. CONFIG.PCW_MIO_27_IOTYPE {LVCMOS 1.8V} \
  689. CONFIG.PCW_MIO_27_PULLUP {enabled} \
  690. CONFIG.PCW_MIO_27_SLEW {slow} \
  691. CONFIG.PCW_MIO_28_DIRECTION {inout} \
  692. CONFIG.PCW_MIO_28_IOTYPE {LVCMOS 1.8V} \
  693. CONFIG.PCW_MIO_28_PULLUP {enabled} \
  694. CONFIG.PCW_MIO_28_SLEW {slow} \
  695. CONFIG.PCW_MIO_29_DIRECTION {inout} \
  696. CONFIG.PCW_MIO_29_IOTYPE {LVCMOS 1.8V} \
  697. CONFIG.PCW_MIO_29_PULLUP {enabled} \
  698. CONFIG.PCW_MIO_29_SLEW {slow} \
  699. CONFIG.PCW_MIO_2_DIRECTION {inout} \
  700. CONFIG.PCW_MIO_2_IOTYPE {LVCMOS 3.3V} \
  701. CONFIG.PCW_MIO_2_PULLUP {disabled} \
  702. CONFIG.PCW_MIO_2_SLEW {slow} \
  703. CONFIG.PCW_MIO_30_DIRECTION {inout} \
  704. CONFIG.PCW_MIO_30_IOTYPE {LVCMOS 1.8V} \
  705. CONFIG.PCW_MIO_30_PULLUP {enabled} \
  706. CONFIG.PCW_MIO_30_SLEW {slow} \
  707. CONFIG.PCW_MIO_31_DIRECTION {inout} \
  708. CONFIG.PCW_MIO_31_IOTYPE {LVCMOS 1.8V} \
  709. CONFIG.PCW_MIO_31_PULLUP {enabled} \
  710. CONFIG.PCW_MIO_31_SLEW {slow} \
  711. CONFIG.PCW_MIO_32_DIRECTION {inout} \
  712. CONFIG.PCW_MIO_32_IOTYPE {LVCMOS 1.8V} \
  713. CONFIG.PCW_MIO_32_PULLUP {enabled} \
  714. CONFIG.PCW_MIO_32_SLEW {slow} \
  715. CONFIG.PCW_MIO_33_DIRECTION {inout} \
  716. CONFIG.PCW_MIO_33_IOTYPE {LVCMOS 1.8V} \
  717. CONFIG.PCW_MIO_33_PULLUP {enabled} \
  718. CONFIG.PCW_MIO_33_SLEW {slow} \
  719. CONFIG.PCW_MIO_34_DIRECTION {inout} \
  720. CONFIG.PCW_MIO_34_IOTYPE {LVCMOS 1.8V} \
  721. CONFIG.PCW_MIO_34_PULLUP {enabled} \
  722. CONFIG.PCW_MIO_34_SLEW {slow} \
  723. CONFIG.PCW_MIO_35_DIRECTION {inout} \
  724. CONFIG.PCW_MIO_35_IOTYPE {LVCMOS 1.8V} \
  725. CONFIG.PCW_MIO_35_PULLUP {enabled} \
  726. CONFIG.PCW_MIO_35_SLEW {slow} \
  727. CONFIG.PCW_MIO_36_DIRECTION {inout} \
  728. CONFIG.PCW_MIO_36_IOTYPE {LVCMOS 1.8V} \
  729. CONFIG.PCW_MIO_36_PULLUP {enabled} \
  730. CONFIG.PCW_MIO_36_SLEW {slow} \
  731. CONFIG.PCW_MIO_37_DIRECTION {inout} \
  732. CONFIG.PCW_MIO_37_IOTYPE {LVCMOS 1.8V} \
  733. CONFIG.PCW_MIO_37_PULLUP {enabled} \
  734. CONFIG.PCW_MIO_37_SLEW {slow} \
  735. CONFIG.PCW_MIO_38_DIRECTION {inout} \
  736. CONFIG.PCW_MIO_38_IOTYPE {LVCMOS 1.8V} \
  737. CONFIG.PCW_MIO_38_PULLUP {enabled} \
  738. CONFIG.PCW_MIO_38_SLEW {slow} \
  739. CONFIG.PCW_MIO_39_DIRECTION {inout} \
  740. CONFIG.PCW_MIO_39_IOTYPE {LVCMOS 1.8V} \
  741. CONFIG.PCW_MIO_39_PULLUP {enabled} \
  742. CONFIG.PCW_MIO_39_SLEW {slow} \
  743. CONFIG.PCW_MIO_3_DIRECTION {inout} \
  744. CONFIG.PCW_MIO_3_IOTYPE {LVCMOS 3.3V} \
  745. CONFIG.PCW_MIO_3_PULLUP {disabled} \
  746. CONFIG.PCW_MIO_3_SLEW {slow} \
  747. CONFIG.PCW_MIO_40_DIRECTION {inout} \
  748. CONFIG.PCW_MIO_40_IOTYPE {LVCMOS 1.8V} \
  749. CONFIG.PCW_MIO_40_PULLUP {enabled} \
  750. CONFIG.PCW_MIO_40_SLEW {slow} \
  751. CONFIG.PCW_MIO_41_DIRECTION {inout} \
  752. CONFIG.PCW_MIO_41_IOTYPE {LVCMOS 1.8V} \
  753. CONFIG.PCW_MIO_41_PULLUP {enabled} \
  754. CONFIG.PCW_MIO_41_SLEW {slow} \
  755. CONFIG.PCW_MIO_42_DIRECTION {inout} \
  756. CONFIG.PCW_MIO_42_IOTYPE {LVCMOS 1.8V} \
  757. CONFIG.PCW_MIO_42_PULLUP {enabled} \
  758. CONFIG.PCW_MIO_42_SLEW {slow} \
  759. CONFIG.PCW_MIO_43_DIRECTION {inout} \
  760. CONFIG.PCW_MIO_43_IOTYPE {LVCMOS 1.8V} \
  761. CONFIG.PCW_MIO_43_PULLUP {enabled} \
  762. CONFIG.PCW_MIO_43_SLEW {slow} \
  763. CONFIG.PCW_MIO_44_DIRECTION {inout} \
  764. CONFIG.PCW_MIO_44_IOTYPE {LVCMOS 1.8V} \
  765. CONFIG.PCW_MIO_44_PULLUP {enabled} \
  766. CONFIG.PCW_MIO_44_SLEW {slow} \
  767. CONFIG.PCW_MIO_45_DIRECTION {inout} \
  768. CONFIG.PCW_MIO_45_IOTYPE {LVCMOS 1.8V} \
  769. CONFIG.PCW_MIO_45_PULLUP {enabled} \
  770. CONFIG.PCW_MIO_45_SLEW {slow} \
  771. CONFIG.PCW_MIO_46_DIRECTION {inout} \
  772. CONFIG.PCW_MIO_46_IOTYPE {LVCMOS 1.8V} \
  773. CONFIG.PCW_MIO_46_PULLUP {enabled} \
  774. CONFIG.PCW_MIO_46_SLEW {slow} \
  775. CONFIG.PCW_MIO_47_DIRECTION {inout} \
  776. CONFIG.PCW_MIO_47_IOTYPE {LVCMOS 1.8V} \
  777. CONFIG.PCW_MIO_47_PULLUP {enabled} \
  778. CONFIG.PCW_MIO_47_SLEW {slow} \
  779. CONFIG.PCW_MIO_48_DIRECTION {out} \
  780. CONFIG.PCW_MIO_48_IOTYPE {LVCMOS 1.8V} \
  781. CONFIG.PCW_MIO_48_PULLUP {enabled} \
  782. CONFIG.PCW_MIO_48_SLEW {slow} \
  783. CONFIG.PCW_MIO_49_DIRECTION {in} \
  784. CONFIG.PCW_MIO_49_IOTYPE {LVCMOS 1.8V} \
  785. CONFIG.PCW_MIO_49_PULLUP {enabled} \
  786. CONFIG.PCW_MIO_49_SLEW {slow} \
  787. CONFIG.PCW_MIO_4_DIRECTION {inout} \
  788. CONFIG.PCW_MIO_4_IOTYPE {LVCMOS 3.3V} \
  789. CONFIG.PCW_MIO_4_PULLUP {disabled} \
  790. CONFIG.PCW_MIO_4_SLEW {slow} \
  791. CONFIG.PCW_MIO_50_DIRECTION {inout} \
  792. CONFIG.PCW_MIO_50_IOTYPE {LVCMOS 1.8V} \
  793. CONFIG.PCW_MIO_50_PULLUP {enabled} \
  794. CONFIG.PCW_MIO_50_SLEW {slow} \
  795. CONFIG.PCW_MIO_51_DIRECTION {inout} \
  796. CONFIG.PCW_MIO_51_IOTYPE {LVCMOS 1.8V} \
  797. CONFIG.PCW_MIO_51_PULLUP {enabled} \
  798. CONFIG.PCW_MIO_51_SLEW {slow} \
  799. CONFIG.PCW_MIO_52_DIRECTION {out} \
  800. CONFIG.PCW_MIO_52_IOTYPE {LVCMOS 1.8V} \
  801. CONFIG.PCW_MIO_52_PULLUP {enabled} \
  802. CONFIG.PCW_MIO_52_SLEW {slow} \
  803. CONFIG.PCW_MIO_53_DIRECTION {inout} \
  804. CONFIG.PCW_MIO_53_IOTYPE {LVCMOS 1.8V} \
  805. CONFIG.PCW_MIO_53_PULLUP {enabled} \
  806. CONFIG.PCW_MIO_53_SLEW {slow} \
  807. CONFIG.PCW_MIO_5_DIRECTION {inout} \
  808. CONFIG.PCW_MIO_5_IOTYPE {LVCMOS 3.3V} \
  809. CONFIG.PCW_MIO_5_PULLUP {disabled} \
  810. CONFIG.PCW_MIO_5_SLEW {slow} \
  811. CONFIG.PCW_MIO_6_DIRECTION {inout} \
  812. CONFIG.PCW_MIO_6_IOTYPE {LVCMOS 3.3V} \
  813. CONFIG.PCW_MIO_6_PULLUP {disabled} \
  814. CONFIG.PCW_MIO_6_SLEW {slow} \
  815. CONFIG.PCW_MIO_7_DIRECTION {out} \
  816. CONFIG.PCW_MIO_7_IOTYPE {LVCMOS 3.3V} \
  817. CONFIG.PCW_MIO_7_PULLUP {disabled} \
  818. CONFIG.PCW_MIO_7_SLEW {slow} \
  819. CONFIG.PCW_MIO_8_DIRECTION {out} \
  820. CONFIG.PCW_MIO_8_IOTYPE {LVCMOS 3.3V} \
  821. CONFIG.PCW_MIO_8_PULLUP {disabled} \
  822. CONFIG.PCW_MIO_8_SLEW {slow} \
  823. CONFIG.PCW_MIO_9_DIRECTION {inout} \
  824. CONFIG.PCW_MIO_9_IOTYPE {LVCMOS 3.3V} \
  825. CONFIG.PCW_MIO_9_PULLUP {enabled} \
  826. CONFIG.PCW_MIO_9_SLEW {slow} \
  827. CONFIG.PCW_MIO_TREE_PERIPHERALS {GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#GPIO#GPIO#UART 1#UART 1#I2C 0#I2C 0#Enet 0#Enet 0} \
  828. CONFIG.PCW_MIO_TREE_SIGNALS {gpio[0]#gpio[1]#gpio[2]#gpio[3]#gpio[4]#gpio[5]#gpio[6]#gpio[7]#gpio[8]#gpio[9]#gpio[10]#gpio[11]#gpio[12]#gpio[13]#gpio[14]#gpio[15]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#gpio[28]#gpio[29]#gpio[30]#gpio[31]#gpio[32]#gpio[33]#gpio[34]#gpio[35]#gpio[36]#gpio[37]#gpio[38]#gpio[39]#clk#cmd#data[0]#data[1]#data[2]#data[3]#gpio[46]#gpio[47]#tx#rx#scl#sda#mdc#mdio} \
  829. CONFIG.PCW_P2F_ENET0_INTR {1} \
  830. CONFIG.PCW_PCAP_PERIPHERAL_DIVISOR0 {5} \
  831. CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V} \
  832. CONFIG.PCW_QSPI_PERIPHERAL_DIVISOR0 {1} \
  833. CONFIG.PCW_SD0_GRP_CD_ENABLE {0} \
  834. CONFIG.PCW_SD0_GRP_POW_ENABLE {0} \
  835. CONFIG.PCW_SD0_GRP_WP_ENABLE {0} \
  836. CONFIG.PCW_SD0_PERIPHERAL_ENABLE {1} \
  837. CONFIG.PCW_SD0_SD0_IO {MIO 40 .. 45} \
  838. CONFIG.PCW_SDIO_PERIPHERAL_CLKSRC {IO PLL} \
  839. CONFIG.PCW_SDIO_PERIPHERAL_DIVISOR0 {40} \
  840. CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {25} \
  841. CONFIG.PCW_SDIO_PERIPHERAL_VALID {1} \
  842. CONFIG.PCW_SMC_PERIPHERAL_DIVISOR0 {1} \
  843. CONFIG.PCW_SPI_PERIPHERAL_DIVISOR0 {1} \
  844. CONFIG.PCW_S_AXI_HP0_DATA_WIDTH {32} \
  845. CONFIG.PCW_S_AXI_HP1_DATA_WIDTH {32} \
  846. CONFIG.PCW_TPIU_PERIPHERAL_DIVISOR0 {1} \
  847. CONFIG.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ {133.333333} \
  848. CONFIG.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ {133.333333} \
  849. CONFIG.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ {133.333333} \
  850. CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0} \
  851. CONFIG.PCW_TTC0_TTC0_IO {<Select>} \
  852. CONFIG.PCW_TTC_PERIPHERAL_FREQMHZ {50} \
  853. CONFIG.PCW_UART1_GRP_FULL_ENABLE {0} \
  854. CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1} \
  855. CONFIG.PCW_UART1_UART1_IO {MIO 48 .. 49} \
  856. CONFIG.PCW_UART_PERIPHERAL_DIVISOR0 {10} \
  857. CONFIG.PCW_UART_PERIPHERAL_FREQMHZ {100} \
  858. CONFIG.PCW_UART_PERIPHERAL_VALID {1} \
  859. CONFIG.PCW_UIPARAM_ACT_DDR_FREQ_MHZ {533.333374} \
  860. CONFIG.PCW_UIPARAM_DDR_AL {0} \
  861. CONFIG.PCW_UIPARAM_DDR_BANK_ADDR_COUNT {3} \
  862. CONFIG.PCW_UIPARAM_DDR_BL {8} \
  863. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.271} \
  864. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.259} \
  865. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.219} \
  866. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.207} \
  867. CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {32 Bit} \
  868. CONFIG.PCW_UIPARAM_DDR_CL {7} \
  869. CONFIG.PCW_UIPARAM_DDR_CLOCK_STOP_EN {0} \
  870. CONFIG.PCW_UIPARAM_DDR_COL_ADDR_COUNT {10} \
  871. CONFIG.PCW_UIPARAM_DDR_CWL {6} \
  872. CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY {4096 MBits} \
  873. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.229} \
  874. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.250} \
  875. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {0.121} \
  876. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {0.146} \
  877. CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH {16 Bits} \
  878. CONFIG.PCW_UIPARAM_DDR_ECC {Disabled} \
  879. CONFIG.PCW_UIPARAM_DDR_ENABLE {1} \
  880. CONFIG.PCW_UIPARAM_DDR_FREQ_MHZ {533.333} \
  881. CONFIG.PCW_UIPARAM_DDR_HIGH_TEMP {Normal (0-85)} \
  882. CONFIG.PCW_UIPARAM_DDR_MEMORY_TYPE {DDR 3} \
  883. CONFIG.PCW_UIPARAM_DDR_PARTNO {MT41J256M16 RE-125} \
  884. CONFIG.PCW_UIPARAM_DDR_ROW_ADDR_COUNT {15} \
  885. CONFIG.PCW_UIPARAM_DDR_SPEED_BIN {DDR3_1066F} \
  886. CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE {1} \
  887. CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE {1} \
  888. CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL {1} \
  889. CONFIG.PCW_UIPARAM_DDR_T_FAW {40.0} \
  890. CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {35.0} \
  891. CONFIG.PCW_UIPARAM_DDR_T_RC {48.91} \
  892. CONFIG.PCW_UIPARAM_DDR_T_RCD {7} \
  893. CONFIG.PCW_UIPARAM_DDR_T_RP {7} \
  894. CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {0} \
  895. CONFIG.PCW_USB0_RESET_ENABLE {0} \
  896. CONFIG.PCW_USB1_RESET_ENABLE {0} \
  897. CONFIG.PCW_USB_RESET_ENABLE {0} \
  898. CONFIG.PCW_USE_AXI_NONSECURE {0} \
  899. CONFIG.PCW_USE_FABRIC_INTERRUPT {0} \
  900. CONFIG.PCW_USE_M_AXI_GP0 {1} \
  901. CONFIG.PCW_USE_M_AXI_GP1 {1} \
  902. CONFIG.PCW_USE_S_AXI_GP0 {0} \
  903. CONFIG.PCW_USE_S_AXI_HP0 {1} \
  904. CONFIG.PCW_USE_S_AXI_HP1 {1} \
  905. CONFIG.PCW_WDT_PERIPHERAL_ENABLE {0} \
  906. CONFIG.PCW_WDT_PERIPHERAL_FREQMHZ {133.333333} \
  907. CONFIG.PCW_WDT_WDT_IO {<Select>} \
  908. ] $processing_system7_0
  909. # Create instance: ps7_0_axi_periph, and set properties
  910. set ps7_0_axi_periph [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 ps7_0_axi_periph ]
  911. set_property -dict [ list \
  912. CONFIG.M00_HAS_DATA_FIFO {0} \
  913. CONFIG.M00_HAS_REGSLICE {3} \
  914. CONFIG.M01_HAS_DATA_FIFO {0} \
  915. CONFIG.M01_HAS_REGSLICE {3} \
  916. CONFIG.NUM_MI {2} \
  917. CONFIG.S00_HAS_DATA_FIFO {1} \
  918. CONFIG.S00_HAS_REGSLICE {4} \
  919. ] $ps7_0_axi_periph
  920. # Create instance: rst_ps7_0_25M, and set properties
  921. set rst_ps7_0_25M [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 rst_ps7_0_25M ]
  922. set_property -dict [ list \
  923. CONFIG.C_NUM_INTERCONNECT_ARESETN {1} \
  924. CONFIG.C_NUM_PERP_ARESETN {1} \
  925. ] $rst_ps7_0_25M
  926. # Create instance: video
  927. create_hier_cell_video [current_bd_instance .] video
  928. # Create instance: xlslice_0, and set properties
  929. set xlslice_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_0 ]
  930. set_property -dict [ list \
  931. CONFIG.DIN_FROM {23} \
  932. CONFIG.DIN_TO {16} \
  933. CONFIG.DIN_WIDTH {32} \
  934. CONFIG.DOUT_WIDTH {8} \
  935. ] $xlslice_0
  936. # Create instance: xlslice_1, and set properties
  937. set xlslice_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_1 ]
  938. set_property -dict [ list \
  939. CONFIG.DIN_FROM {15} \
  940. CONFIG.DIN_TO {8} \
  941. CONFIG.DIN_WIDTH {32} \
  942. CONFIG.DOUT_WIDTH {8} \
  943. ] $xlslice_1
  944. # Create instance: xlslice_2, and set properties
  945. set xlslice_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_2 ]
  946. set_property -dict [ list \
  947. CONFIG.DIN_FROM {7} \
  948. CONFIG.DIN_TO {0} \
  949. CONFIG.DIN_WIDTH {32} \
  950. CONFIG.DOUT_WIDTH {8} \
  951. ] $xlslice_2
  952. # Create interface connections
  953. connect_bd_intf_net -intf_net MNTZorro_v0_1_S00_AXI_0_m00_axi [get_bd_intf_pins MNTZorro_v0_1_S00_AXI_0/m00_axi] [get_bd_intf_pins axi_protocol_convert_2/S_AXI]
  954. connect_bd_intf_net -intf_net axi_protocol_convert_0_M_AXI [get_bd_intf_pins MNTZorro_v0_1_S00_AXI_0/S_AXI] [get_bd_intf_pins axi_protocol_convert_0/M_AXI]
  955. connect_bd_intf_net -intf_net axi_protocol_convert_1_M_AXI [get_bd_intf_pins axi_protocol_convert_1/M_AXI] [get_bd_intf_pins axi_register_slice_1/S_AXI]
  956. connect_bd_intf_net -intf_net axi_protocol_convert_2_M_AXI [get_bd_intf_pins axi_protocol_convert_2/M_AXI] [get_bd_intf_pins axi_register_slice_3/S_AXI]
  957. connect_bd_intf_net -intf_net axi_register_slice_0_M_AXI [get_bd_intf_pins axi_register_slice_0/M_AXI] [get_bd_intf_pins axi_register_slice_2/S_AXI]
  958. connect_bd_intf_net -intf_net axi_register_slice_1_M_AXI [get_bd_intf_pins axi_register_slice_1/M_AXI] [get_bd_intf_pins processing_system7_0/S_AXI_HP0]
  959. connect_bd_intf_net -intf_net axi_register_slice_2_M_AXI [get_bd_intf_pins axi_protocol_convert_1/S_AXI] [get_bd_intf_pins axi_register_slice_2/M_AXI]
  960. connect_bd_intf_net -intf_net axi_register_slice_3_M_AXI [get_bd_intf_pins axi_register_slice_3/M_AXI] [get_bd_intf_pins processing_system7_0/S_AXI_HP1]
  961. connect_bd_intf_net -intf_net processing_system7_0_DDR [get_bd_intf_ports DDR] [get_bd_intf_pins processing_system7_0/DDR]
  962. connect_bd_intf_net -intf_net processing_system7_0_FIXED_IO [get_bd_intf_ports FIXED_IO] [get_bd_intf_pins processing_system7_0/FIXED_IO]
  963. connect_bd_intf_net -intf_net processing_system7_0_M_AXI_GP0 [get_bd_intf_pins axi_protocol_convert_0/S_AXI] [get_bd_intf_pins processing_system7_0/M_AXI_GP0]
  964. connect_bd_intf_net -intf_net processing_system7_0_M_AXI_GP1 [get_bd_intf_pins processing_system7_0/M_AXI_GP1] [get_bd_intf_pins ps7_0_axi_periph/S00_AXI]
  965. connect_bd_intf_net -intf_net ps7_0_axi_periph_M00_AXI [get_bd_intf_pins clk_wiz_0/s_axi_lite] [get_bd_intf_pins ps7_0_axi_periph/M00_AXI]
  966. connect_bd_intf_net -intf_net ps7_0_axi_periph_M01_AXI [get_bd_intf_pins ps7_0_axi_periph/M01_AXI] [get_bd_intf_pins video/S_AXI_LITE]
  967. connect_bd_intf_net -intf_net video_subsystem_M_AXI_MM2S [get_bd_intf_pins axi_register_slice_0/S_AXI] [get_bd_intf_pins video/M_AXI_MM2S]
  968. # Create port connections
  969. connect_bd_net -net M00_ARESETN_1 [get_bd_pins ps7_0_axi_periph/ARESETN] [get_bd_pins ps7_0_axi_periph/M00_ARESETN] [get_bd_pins ps7_0_axi_periph/M01_ARESETN] [get_bd_pins ps7_0_axi_periph/S00_ARESETN] [get_bd_pins rst_ps7_0_25M/interconnect_aresetn]
  970. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_ADDRDIR [get_bd_ports ZORRO_ADDRDIR] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_ADDRDIR]
  971. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_ADDRDIR2 [get_bd_ports ZORRO_ADDRDIR2] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_ADDRDIR2]
  972. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_DATADIR [get_bd_ports ZORRO_DATADIR] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_DATADIR]
  973. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_INT6 [get_bd_ports ZORRO_INT6] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_INT6]
  974. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_NBRN [get_bd_ports ZORRO_NBRN] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NBRN]
  975. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_NCFGOUT [get_bd_ports ZORRO_NCFGOUT] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NCFGOUT]
  976. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_NCINH [get_bd_ports ZORRO_NCINH] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NCINH]
  977. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_NDTACK [get_bd_ports ZORRO_NDTACK] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NDTACK]
  978. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_ZORRO_NSLAVE [get_bd_ports ZORRO_NSLAVE] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NSLAVE]
  979. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_data [get_bd_pins MNTZorro_v0_1_S00_AXI_0/video_control_data] [get_bd_pins video/control_data]
  980. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_interlace [get_bd_pins MNTZorro_v0_1_S00_AXI_0/video_control_interlace] [get_bd_pins video/control_interlace]
  981. connect_bd_net -net MNTZorro_v0_1_S00_AXI_0_video_control_op [get_bd_pins MNTZorro_v0_1_S00_AXI_0/video_control_op] [get_bd_pins video/control_op]
  982. connect_bd_net -net Net [get_bd_ports ZORRO_ADDR] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_ADDR]
  983. connect_bd_net -net Net1 [get_bd_ports ZORRO_DATA] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_DATA]
  984. connect_bd_net -net VCAP_B0_0_1 [get_bd_ports VCAP_B0] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B0]
  985. connect_bd_net -net VCAP_B1_0_1 [get_bd_ports VCAP_B1] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B1]
  986. connect_bd_net -net VCAP_B2_0_1 [get_bd_ports VCAP_B2] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B2]
  987. connect_bd_net -net VCAP_B3_0_1 [get_bd_ports VCAP_B3] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B3]
  988. connect_bd_net -net VCAP_B4_0_1 [get_bd_ports VCAP_B4] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B4]
  989. connect_bd_net -net VCAP_B5_0_1 [get_bd_ports VCAP_B5] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B5]
  990. connect_bd_net -net VCAP_B6_0_1 [get_bd_ports VCAP_B6] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B6]
  991. connect_bd_net -net VCAP_B7_0_1 [get_bd_ports VCAP_B7] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_B7]
  992. connect_bd_net -net VCAP_G0_0_1 [get_bd_ports VCAP_G0] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G0]
  993. connect_bd_net -net VCAP_G1_0_1 [get_bd_ports VCAP_G1] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G1]
  994. connect_bd_net -net VCAP_G2_0_1 [get_bd_ports VCAP_G2] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G2]
  995. connect_bd_net -net VCAP_G3_0_1 [get_bd_ports VCAP_G3] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G3]
  996. connect_bd_net -net VCAP_G4_0_1 [get_bd_ports VCAP_G4] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G4]
  997. connect_bd_net -net VCAP_G5_0_1 [get_bd_ports VCAP_G5] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G5]
  998. connect_bd_net -net VCAP_G6_0_1 [get_bd_ports VCAP_G6] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G6]
  999. connect_bd_net -net VCAP_G7_0_1 [get_bd_ports VCAP_G7] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_G7]
  1000. connect_bd_net -net VCAP_HSYNC_0_1 [get_bd_ports VCAP_HSYNC] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_HSYNC]
  1001. connect_bd_net -net VCAP_R0_0_1 [get_bd_ports VCAP_R0] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R0]
  1002. connect_bd_net -net VCAP_R1_0_1 [get_bd_ports VCAP_R1] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R1]
  1003. connect_bd_net -net VCAP_R2_0_1 [get_bd_ports VCAP_R2] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R2]
  1004. connect_bd_net -net VCAP_R3_0_1 [get_bd_ports VCAP_R3] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R3]
  1005. connect_bd_net -net VCAP_R4_0_1 [get_bd_ports VCAP_R4] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R4]
  1006. connect_bd_net -net VCAP_R5_0_1 [get_bd_ports VCAP_R5] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R5]
  1007. connect_bd_net -net VCAP_R6_0_1 [get_bd_ports VCAP_R6] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R6]
  1008. connect_bd_net -net VCAP_R7_0_1 [get_bd_ports VCAP_R7] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_R7]
  1009. connect_bd_net -net VCAP_VSYNC_0_1 [get_bd_ports VCAP_VSYNC] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/VCAP_VSYNC]
  1010. connect_bd_net -net ZORRO_C28D_0_1 [get_bd_ports ZORRO_C28D] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_C28D]
  1011. connect_bd_net -net ZORRO_DOE_1 [get_bd_ports ZORRO_DOE] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_DOE]
  1012. connect_bd_net -net ZORRO_E7M_1 [get_bd_ports ZORRO_E7M] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_E7M]
  1013. connect_bd_net -net ZORRO_NBGN_0_1 [get_bd_ports ZORRO_NBGN] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NBGN]
  1014. connect_bd_net -net ZORRO_NCCS_1 [get_bd_ports ZORRO_NCCS] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NCCS]
  1015. connect_bd_net -net ZORRO_NCFGIN_1 [get_bd_ports ZORRO_NCFGIN] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NCFGIN]
  1016. connect_bd_net -net ZORRO_NDS0_1 [get_bd_ports ZORRO_NDS0] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NDS0]
  1017. connect_bd_net -net ZORRO_NDS1_1 [get_bd_ports ZORRO_NDS1] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NDS1]
  1018. connect_bd_net -net ZORRO_NFCS_1 [get_bd_ports ZORRO_NFCS] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NFCS]
  1019. connect_bd_net -net ZORRO_NIORST_1 [get_bd_ports ZORRO_NIORST] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NIORST]
  1020. connect_bd_net -net ZORRO_NLDS_1 [get_bd_ports ZORRO_NLDS] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NLDS]
  1021. connect_bd_net -net ZORRO_NUDS_1 [get_bd_ports ZORRO_NUDS] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_NUDS]
  1022. connect_bd_net -net ZORRO_READ_1 [get_bd_ports ZORRO_READ] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/ZORRO_READ]
  1023. connect_bd_net -net clk_1 [get_bd_ports VGA_PCLK] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins video/VGA_PCLK]
  1024. connect_bd_net -net proc_sys_reset_1_peripheral_aresetn [get_bd_pins MNTZorro_v0_1_S00_AXI_0/S_AXI_ARESETN] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/m00_axi_aresetn] [get_bd_pins axi_protocol_convert_0/aresetn] [get_bd_pins axi_protocol_convert_1/aresetn] [get_bd_pins axi_protocol_convert_2/aresetn] [get_bd_pins axi_register_slice_0/aresetn] [get_bd_pins axi_register_slice_1/aresetn] [get_bd_pins axi_register_slice_2/aresetn] [get_bd_pins axi_register_slice_3/aresetn] [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins video/aresetn]
  1025. connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins MNTZorro_v0_1_S00_AXI_0/S_AXI_ACLK] [get_bd_pins MNTZorro_v0_1_S00_AXI_0/m00_axi_aclk] [get_bd_pins axi_protocol_convert_0/aclk] [get_bd_pins axi_protocol_convert_1/aclk] [get_bd_pins axi_protocol_convert_2/aclk] [get_bd_pins axi_register_slice_0/aclk] [get_bd_pins axi_register_slice_1/aclk] [get_bd_pins axi_register_slice_2/aclk] [get_bd_pins axi_register_slice_3/aclk] [get_bd_pins clk_wiz_0/clk_in1] [get_bd_pins proc_sys_reset_0/slowest_sync_clk] [get_bd_pins processing_system7_0/FCLK_CLK0] [get_bd_pins processing_system7_0/M_AXI_GP0_ACLK] [get_bd_pins processing_system7_0/S_AXI_HP0_ACLK] [get_bd_pins processing_system7_0/S_AXI_HP1_ACLK] [get_bd_pins video/m_axi_mm2s_aclk]
  1026. connect_bd_net -net processing_system7_0_FCLK_CLK1 [get_bd_pins clk_wiz_0/s_axi_aclk] [get_bd_pins processing_system7_0/FCLK_CLK1] [get_bd_pins processing_system7_0/M_AXI_GP1_ACLK] [get_bd_pins ps7_0_axi_periph/ACLK] [get_bd_pins ps7_0_axi_periph/M00_ACLK] [get_bd_pins ps7_0_axi_periph/M01_ACLK] [get_bd_pins ps7_0_axi_periph/S00_ACLK] [get_bd_pins rst_ps7_0_25M/slowest_sync_clk] [get_bd_pins video/s_axi_lite_aclk]
  1027. connect_bd_net -net processing_system7_0_FCLK_RESET0_N [get_bd_pins proc_sys_reset_0/ext_reset_in] [get_bd_pins processing_system7_0/FCLK_RESET0_N] [get_bd_pins rst_ps7_0_25M/ext_reset_in]
  1028. connect_bd_net -net rst_ps7_0_25M_peripheral_aresetn [get_bd_pins clk_wiz_0/s_axi_aresetn] [get_bd_pins rst_ps7_0_25M/peripheral_aresetn] [get_bd_pins video/axi_resetn]
  1029. connect_bd_net -net v_axi4s_vid_out_0_vid_data [get_bd_pins video/dvi_rgb] [get_bd_pins xlslice_0/Din] [get_bd_pins xlslice_1/Din] [get_bd_pins xlslice_2/Din]
  1030. connect_bd_net -net video_subsystem_VGA_DE [get_bd_ports VGA_DE] [get_bd_pins video/VGA_DE]
  1031. connect_bd_net -net video_subsystem_VGA_HS [get_bd_ports VGA_HS] [get_bd_pins video/VGA_HS]
  1032. connect_bd_net -net video_subsystem_VGA_VS [get_bd_ports VGA_VS] [get_bd_pins video/VGA_VS]
  1033. connect_bd_net -net xlslice_0_Dout [get_bd_ports VGA_R] [get_bd_pins xlslice_0/Dout]
  1034. connect_bd_net -net xlslice_1_Dout [get_bd_ports VGA_G] [get_bd_pins xlslice_1/Dout]
  1035. connect_bd_net -net xlslice_2_Dout [get_bd_ports VGA_B] [get_bd_pins xlslice_2/Dout]
  1036. # Create address segments
  1037. create_bd_addr_seg -range 0x40000000 -offset 0x00000000 [get_bd_addr_spaces MNTZorro_v0_1_S00_AXI_0/m00_axi] [get_bd_addr_segs processing_system7_0/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_processing_system7_0_HP1_DDR_LOWOCM
  1038. create_bd_addr_seg -range 0x00010000 -offset 0x43C00000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs MNTZorro_v0_1_S00_AXI_0/S_AXI/reg0] SEG_MNTZorro_v0_1_S00_AXI_0_reg0
  1039. create_bd_addr_seg -range 0x00010000 -offset 0x83000000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs video/axi_vdma_0/S_AXI_LITE/Reg] SEG_axi_vdma_0_Reg
  1040. create_bd_addr_seg -range 0x00010000 -offset 0x83C00000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs clk_wiz_0/s_axi_lite/Reg] SEG_clk_wiz_0_Reg
  1041. create_bd_addr_seg -range 0x40000000 -offset 0x00000000 [get_bd_addr_spaces video/axi_vdma_0/Data_MM2S] [get_bd_addr_segs processing_system7_0/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_processing_system7_0_HP0_DDR_LOWOCM
  1042. # Restore current instance
  1043. current_bd_instance $oldCurInst
  1044. validate_bd_design
  1045. save_bd_design
  1046. close_bd_design $design_name
  1047. }
  1048. # End of cr_bd_zz9000_ps()
  1049. cr_bd_zz9000_ps ""
  1050. set_property REGISTERED_WITH_MANAGER "1" [get_files zz9000_ps.bd ]
  1051. set_property SYNTH_CHECKPOINT_MODE "Hierarchical" [get_files zz9000_ps.bd ]
  1052. # Create 'synth_1' run (if not found)
  1053. if {[string equal [get_runs -quiet synth_1] ""]} {
  1054. create_run -name synth_1 -part xc7z020clg400-1 -flow {Vivado Synthesis 2018} -strategy "Flow_AreaOptimized_high" -report_strategy {No Reports} -constrset constrs_1
  1055. } else {
  1056. set_property strategy "Flow_AreaOptimized_high" [get_runs synth_1]
  1057. set_property flow "Vivado Synthesis 2018" [get_runs synth_1]
  1058. }
  1059. set obj [get_runs synth_1]
  1060. set_property set_report_strategy_name 1 $obj
  1061. set_property report_strategy {Vivado Synthesis Default Reports} $obj
  1062. set_property set_report_strategy_name 0 $obj
  1063. # Create 'synth_1_synth_report_utilization_0' report (if not found)
  1064. if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } {
  1065. create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1
  1066. }
  1067. set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0]
  1068. if { $obj != "" } {
  1069. set_property -name "display_name" -value "synth_1_synth_report_utilization_0" -objects $obj
  1070. }
  1071. set obj [get_runs synth_1]
  1072. set_property -name "part" -value "xc7z020clg400-1" -objects $obj
  1073. set_property -name "strategy" -value "Flow_AreaOptimized_high" -objects $obj
  1074. set_property -name "steps.synth_design.args.directive" -value "AreaOptimized_high" -objects $obj
  1075. set_property -name "steps.synth_design.args.control_set_opt_threshold" -value "1" -objects $obj
  1076. # set the current synth run
  1077. current_run -synthesis [get_runs synth_1]
  1078. # Create 'impl_1' run (if not found)
  1079. if {[string equal [get_runs -quiet impl_1] ""]} {
  1080. create_run -name impl_1 -part xc7z020clg400-1 -flow {Vivado Implementation 2018} -strategy "Flow_RunPostRoutePhysOpt" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1
  1081. } else {
  1082. set_property strategy "Flow_RunPostRoutePhysOpt" [get_runs impl_1]
  1083. set_property flow "Vivado Implementation 2018" [get_runs impl_1]
  1084. }
  1085. set obj [get_runs impl_1]
  1086. set_property set_report_strategy_name 1 $obj
  1087. set_property report_strategy {Timing Closure Reports} $obj
  1088. set_property set_report_strategy_name 0 $obj
  1089. # Create 'impl_1_opt_report_drc_0' report (if not found)
  1090. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } {
  1091. create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1
  1092. }
  1093. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0]
  1094. if { $obj != "" } {
  1095. set_property -name "display_name" -value "impl_1_opt_report_drc_0" -objects $obj
  1096. }
  1097. # Create 'impl_1_opt_report_utilization_0' report (if not found)
  1098. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_utilization_0] "" ] } {
  1099. create_report_config -report_name impl_1_opt_report_utilization_0 -report_type report_utilization:1.0 -steps opt_design -runs impl_1
  1100. }
  1101. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_utilization_0]
  1102. if { $obj != "" } {
  1103. set_property -name "display_name" -value "impl_1_opt_report_utilization_0" -objects $obj
  1104. }
  1105. # Create 'impl_1_opt_report_methodology_0' report (if not found)
  1106. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_methodology_0] "" ] } {
  1107. create_report_config -report_name impl_1_opt_report_methodology_0 -report_type report_methodology:1.0 -steps opt_design -runs impl_1
  1108. }
  1109. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_methodology_0]
  1110. if { $obj != "" } {
  1111. set_property -name "display_name" -value "impl_1_opt_report_methodology_0" -objects $obj
  1112. }
  1113. # Create 'impl_1_opt_report_timing_summary_0' report (if not found)
  1114. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } {
  1115. create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1
  1116. }
  1117. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0]
  1118. if { $obj != "" } {
  1119. set_property -name "display_name" -value "impl_1_opt_report_timing_summary_0" -objects $obj
  1120. }
  1121. # Create 'impl_1_place_report_io_0' report (if not found)
  1122. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } {
  1123. create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1
  1124. }
  1125. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0]
  1126. if { $obj != "" } {
  1127. set_property -name "display_name" -value "impl_1_place_report_io_0" -objects $obj
  1128. }
  1129. # Create 'impl_1_place_report_incremental_reuse_0' report (if not found)
  1130. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } {
  1131. create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1
  1132. }
  1133. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0]
  1134. if { $obj != "" } {
  1135. set_property -name "display_name" -value "impl_1_place_report_incremental_reuse_0" -objects $obj
  1136. }
  1137. # Create 'impl_1_place_report_timing_summary_0' report (if not found)
  1138. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } {
  1139. create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1
  1140. }
  1141. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0]
  1142. if { $obj != "" } {
  1143. set_property -name "display_name" -value "impl_1_place_report_timing_summary_0" -objects $obj
  1144. }
  1145. # Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found)
  1146. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } {
  1147. create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1
  1148. }
  1149. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0]
  1150. if { $obj != "" } {
  1151. set_property -name "display_name" -value "impl_1_phys_opt_report_timing_summary_0" -objects $obj
  1152. }
  1153. # Create 'impl_1_phys_opt_report_design_analysis_0' report (if not found)
  1154. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_design_analysis_0] "" ] } {
  1155. create_report_config -report_name impl_1_phys_opt_report_design_analysis_0 -report_type report_design_analysis:1.0 -steps phys_opt_design -runs impl_1
  1156. }
  1157. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_design_analysis_0]
  1158. if { $obj != "" } {
  1159. set_property -name "display_name" -value "impl_1_phys_opt_report_design_analysis_0" -objects $obj
  1160. }
  1161. # Create 'impl_1_route_report_utilization_0' report (if not found)
  1162. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_utilization_0] "" ] } {
  1163. create_report_config -report_name impl_1_route_report_utilization_0 -report_type report_utilization:1.0 -steps route_design -runs impl_1
  1164. }
  1165. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_utilization_0]
  1166. if { $obj != "" } {
  1167. set_property -name "display_name" -value "impl_1_route_report_utilization_0" -objects $obj
  1168. }
  1169. # Create 'impl_1_route_report_clock_utilization_0' report (if not found)
  1170. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } {
  1171. create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1
  1172. }
  1173. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0]
  1174. if { $obj != "" } {
  1175. set_property -name "display_name" -value "impl_1_route_report_clock_utilization_0" -objects $obj
  1176. }
  1177. # Create 'impl_1_route_report_drc_0' report (if not found)
  1178. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } {
  1179. create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1
  1180. }
  1181. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0]
  1182. if { $obj != "" } {
  1183. set_property -name "display_name" -value "impl_1_route_report_drc_0" -objects $obj
  1184. }
  1185. # Create 'impl_1_route_report_power_0' report (if not found)
  1186. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } {
  1187. create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1
  1188. }
  1189. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0]
  1190. if { $obj != "" } {
  1191. set_property -name "display_name" -value "impl_1_route_report_power_0" -objects $obj
  1192. }
  1193. # Create 'impl_1_route_report_route_status_0' report (if not found)
  1194. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } {
  1195. create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1
  1196. }
  1197. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0]
  1198. if { $obj != "" } {
  1199. set_property -name "display_name" -value "impl_1_route_report_route_status_0" -objects $obj
  1200. }
  1201. # Create 'impl_1_route_report_timing_summary_0' report (if not found)
  1202. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } {
  1203. create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1
  1204. }
  1205. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0]
  1206. if { $obj != "" } {
  1207. set_property -name "display_name" -value "impl_1_route_report_timing_summary_0" -objects $obj
  1208. }
  1209. # Create 'impl_1_route_report_design_analysis_0' report (if not found)
  1210. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_design_analysis_0] "" ] } {
  1211. create_report_config -report_name impl_1_route_report_design_analysis_0 -report_type report_design_analysis:1.0 -steps route_design -runs impl_1
  1212. }
  1213. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_design_analysis_0]
  1214. if { $obj != "" } {
  1215. set_property -name "display_name" -value "impl_1_route_report_design_analysis_0" -objects $obj
  1216. }
  1217. # Create 'impl_1_route_report_qor_suggestions_0' report (if not found)
  1218. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_qor_suggestions_0] "" ] } {
  1219. create_report_config -report_name impl_1_route_report_qor_suggestions_0 -report_type report_qor_suggestions:1.0 -steps route_design -runs impl_1
  1220. }
  1221. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_qor_suggestions_0]
  1222. if { $obj != "" } {
  1223. set_property -name "display_name" -value "impl_1_route_report_qor_suggestions_0" -objects $obj
  1224. }
  1225. # Create 'impl_1_route_report_incremental_reuse_0' report (if not found)
  1226. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } {
  1227. create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1
  1228. }
  1229. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0]
  1230. if { $obj != "" } {
  1231. set_property -name "display_name" -value "impl_1_route_report_incremental_reuse_0" -objects $obj
  1232. }
  1233. # Create 'impl_1_route_report_bus_skew_0' report (if not found)
  1234. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } {
  1235. create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1
  1236. }
  1237. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0]
  1238. if { $obj != "" } {
  1239. set_property -name "display_name" -value "impl_1_route_report_bus_skew_0" -objects $obj
  1240. }
  1241. # Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found)
  1242. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } {
  1243. create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1
  1244. }
  1245. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0]
  1246. if { $obj != "" } {
  1247. set_property -name "display_name" -value "impl_1_post_route_phys_opt_report_timing_summary_0" -objects $obj
  1248. }
  1249. # Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found)
  1250. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } {
  1251. create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1
  1252. }
  1253. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0]
  1254. if { $obj != "" } {
  1255. set_property -name "display_name" -value "impl_1_post_route_phys_opt_report_bus_skew_0" -objects $obj
  1256. }
  1257. set obj [get_runs impl_1]
  1258. set_property -name "part" -value "xc7z020clg400-1" -objects $obj
  1259. set_property -name "strategy" -value "Flow_RunPostRoutePhysOpt" -objects $obj
  1260. set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj
  1261. set_property -name "steps.phys_opt_design.args.directive" -value "Explore" -objects $obj
  1262. set_property -name "steps.route_design.args.more options" -value "-tns_cleanup" -objects $obj
  1263. set_property -name "steps.post_route_phys_opt_design.is_enabled" -value "1" -objects $obj
  1264. set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj
  1265. set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj
  1266. # set the current impl run
  1267. current_run -implementation [get_runs impl_1]
  1268. puts "INFO: Project created:${_xil_proj_name_}"
  1269. set obj [get_dashboards default_dashboard]
  1270. # Create 'drc_1' gadget (if not found)
  1271. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "drc_1" ] ] ""]} {
  1272. create_dashboard_gadget -name {drc_1} -type drc
  1273. }
  1274. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "drc_1" ] ]
  1275. set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj
  1276. # Create 'methodology_1' gadget (if not found)
  1277. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "methodology_1" ] ] ""]} {
  1278. create_dashboard_gadget -name {methodology_1} -type methodology
  1279. }
  1280. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "methodology_1" ] ]
  1281. set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj
  1282. # Create 'power_1' gadget (if not found)
  1283. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "power_1" ] ] ""]} {
  1284. create_dashboard_gadget -name {power_1} -type power
  1285. }
  1286. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "power_1" ] ]
  1287. set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj
  1288. # Create 'timing_1' gadget (if not found)
  1289. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "timing_1" ] ] ""]} {
  1290. create_dashboard_gadget -name {timing_1} -type timing
  1291. }
  1292. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "timing_1" ] ]
  1293. set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj
  1294. # Create 'utilization_1' gadget (if not found)
  1295. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "utilization_1" ] ] ""]} {
  1296. create_dashboard_gadget -name {utilization_1} -type utilization
  1297. }
  1298. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "utilization_1" ] ]
  1299. set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj
  1300. set_property -name "run.step" -value "synth_design" -objects $obj
  1301. set_property -name "run.type" -value "synthesis" -objects $obj
  1302. # Create 'utilization_2' gadget (if not found)
  1303. if {[string equal [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "utilization_2" ] ] ""]} {
  1304. create_dashboard_gadget -name {utilization_2} -type utilization
  1305. }
  1306. set obj [get_dashboard_gadgets -of_objects [get_dashboards default_dashboard] [ list "utilization_2" ] ]
  1307. set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj
  1308. move_dashboard_gadget -name {utilization_1} -row 0 -col 0
  1309. move_dashboard_gadget -name {power_1} -row 1 -col 0
  1310. move_dashboard_gadget -name {drc_1} -row 2 -col 0
  1311. move_dashboard_gadget -name {timing_1} -row 0 -col 1
  1312. move_dashboard_gadget -name {utilization_2} -row 1 -col 1
  1313. move_dashboard_gadget -name {methodology_1} -row 2 -col 1
  1314. # Set current dashboard to 'default_dashboard'
  1315. current_dashboard default_dashboard