Browse Source

WIP: reform2 schematic detail work all over the board and more footprints and 3d models added; changed one mpcie to M.2/NGFF/NVMe

reform2
mntmn 1 year ago
parent
commit
ec1aa66f73
19 changed files with 156727 additions and 42156 deletions
  1. +22993
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      reform2-motherboard/reform2-motherboard/3d-models/5035000993.stp
  2. +63634
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      reform2-motherboard/reform2-motherboard/3d-models/679105700.stp
  3. +0
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      reform2-motherboard/reform2-motherboard/3d-models/FH12-30S-0.5SH.stp
  4. +44253
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      reform2-motherboard/reform2-motherboard/3d-models/c-1-2199230-5-b2-3d.stp
  5. +20158
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      reform2-motherboard/reform2-motherboard/3d-models/c-1775059-1-d-3d.stp
  6. +2
    -2
      reform2-motherboard/reform2-motherboard/footprints/MOLEX_67910-5700.kicad_mod
  7. +97
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      reform2-motherboard/reform2-motherboard/footprints/TE_1-2199230-5.kicad_mod
  8. +42
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      reform2-motherboard/reform2-motherboard/footprints/TE_1775059-1.kicad_mod
  9. +85
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      reform2-motherboard/reform2-motherboard/footprints/label-mpcie.kicad_mod
  10. +142
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      reform2-motherboard/reform2-motherboard/footprints/reform2-motherboard.pretty/Conn_TE-M.2-0.5-67P-doublesided.kicad_mod
  11. +124
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      reform2-motherboard/reform2-motherboard/footprints/reform2-motherboard.pretty/mntreform.kicad_mod
  12. +18
    -11
      reform2-motherboard/reform2-motherboard/reform2-display.sch
  13. +3584
    -1620
      reform2-motherboard/reform2-motherboard/reform2-motherboard.kicad_pcb
  14. +65
    -0
      reform2-motherboard/reform2-motherboard/reform2-motherboard.sch
  15. +502
    -182
      reform2-motherboard/reform2-motherboard/reform2-pcie.sch
  16. +839
    -141
      reform2-motherboard/reform2-motherboard/reform2-power.sch
  17. +5
    -1
      reform2-motherboard/reform2-motherboard/reform2-sd.sch
  18. +33
    -0
      reform2-motherboard/reform2-motherboard/reform2-usb.sch
  19. +151
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      reform2-motherboard/reform2-motherboard/reform2.lib

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reform2-motherboard/reform2-motherboard/3d-models/5035000993.stp
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reform2-motherboard/reform2-motherboard/3d-models/679105700.stp
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reform2-motherboard/reform2-motherboard/3d-models/FH12-30S-0.5SH.stp
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reform2-motherboard/reform2-motherboard/3d-models/c-1-2199230-5-b2-3d.stp
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reform2-motherboard/reform2-motherboard/3d-models/c-1775059-1-d-3d.stp
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+ 2
- 2
reform2-motherboard/reform2-motherboard/footprints/MOLEX_67910-5700.kicad_mod View File

@@ -1,9 +1,9 @@
(module 67910-5700:MOLEX_67910-5700 (layer F.Cu) (tedit 5B16DED1)
(module MOLEX_67910-5700 (layer F.Cu) (tedit 5D1288FF)
(attr smd)
(fp_text reference U7 (at -12.340457 -6.424727) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "mSATA II" (at -0.190457 -0.124727) (layer F.SilkS) hide
(fp_text value mPCIe (at -0.190457 -0.124727) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1 5.1) (end -3.8 5.1) (layer F.SilkS) (width 0.1524))


+ 97
- 0
reform2-motherboard/reform2-motherboard/footprints/TE_1-2199230-5.kicad_mod View File

@@ -0,0 +1,97 @@
(module TE_1-2199230-5 (layer F.Cu) (tedit 5D127F88)
(attr smd)
(fp_text reference CONN_1-2199230-5 (at 0 -8.3) (layer F.SilkS)
(effects (font (size 1.40373 1.40373) (thickness 0.05)))
)
(fp_text value VAL** (at -6.82325 4.50146) (layer F.SilkS)
(effects (font (size 1.40376 1.40376) (thickness 0.05)))
)
(fp_line (start -10.95 2.5) (end -10.95 -5.25) (layer Eco2.User) (width 0.127))
(fp_line (start -10.95 -5.25) (end 10.95 -5.25) (layer Eco2.User) (width 0.127))
(fp_line (start 10.95 -5.25) (end 10.95 2.5) (layer Eco2.User) (width 0.127))
(fp_line (start 10.95 2.5) (end -10.95 2.5) (layer Eco2.User) (width 0.127))
(fp_line (start -10.95 -2.9) (end -10.95 -0.95) (layer F.SilkS) (width 0.127))
(fp_line (start -10.95 1.2) (end -10.95 2.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.95 2.5) (end -9.35 2.5) (layer F.SilkS) (width 0.127))
(fp_line (start 5.35 2.5) (end 7.15 2.5) (layer F.SilkS) (width 0.127))
(fp_line (start 9.45 2.5) (end 10.95 2.5) (layer F.SilkS) (width 0.127))
(fp_line (start 10.95 2.5) (end 10.95 0.8) (layer F.SilkS) (width 0.127))
(fp_line (start 10.95 -1.05) (end 10.95 -2.8) (layer F.SilkS) (width 0.127))
(fp_line (start 5.1 -5.25) (end 6.9 -5.25) (layer F.SilkS) (width 0.127))
(fp_line (start -11.2 3.3) (end 11.25 3.3) (layer Eco1.User) (width 0.05))
(fp_line (start 11.25 3.3) (end 11.25 -6.3) (layer Eco1.User) (width 0.05))
(fp_line (start 11.25 -6.3) (end -11.2 -6.3) (layer Eco1.User) (width 0.05))
(fp_line (start -11.2 -6.3) (end -11.2 3.3) (layer Eco1.User) (width 0.05))
(fp_circle (center -9.25 -6.5) (end -9.15 -6.5) (layer F.SilkS) (width 0.2))
(pad Hole np_thru_hole circle (at -10 0) (size 1.1 1.1) (drill 1.1) (layers *.Cu *.Mask F.SilkS))
(pad Hole np_thru_hole circle (at 10 0) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask F.SilkS))
(pad 1 smd rect (at -9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -7 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -6.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at -6.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at -6.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -6 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -5.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -5.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at -5.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at -4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at -4.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 30 smd rect (at -4 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at -3.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 32 smd rect (at -3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at -3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 34 smd rect (at -3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at -2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 36 smd rect (at -2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at -2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 38 smd rect (at -2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at -1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 40 smd rect (at -1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 41 smd rect (at -1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 42 smd rect (at -1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 43 smd rect (at -0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 44 smd rect (at -0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 45 smd rect (at -0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 46 smd rect (at 0 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 47 smd rect (at 0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 48 smd rect (at 0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 49 smd rect (at 0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 50 smd rect (at 1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 51 smd rect (at 1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 52 smd rect (at 1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 53 smd rect (at 1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 54 smd rect (at 2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 55 smd rect (at 2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 56 smd rect (at 2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 57 smd rect (at 2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 58 smd rect (at 3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 59 smd rect (at 3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 60 smd rect (at 3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 61 smd rect (at 3.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 62 smd rect (at 4 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 63 smd rect (at 4.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 64 smd rect (at 4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 65 smd rect (at 4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 66 smd rect (at 5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 67 smd rect (at 7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 68 smd rect (at 7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 69 smd rect (at 7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 70 smd rect (at 8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 71 smd rect (at 8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 72 smd rect (at 8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 73 smd rect (at 8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 74 smd rect (at 9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 75 smd rect (at 9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad S1 smd rect (at -10.35 -4.5) (size 1.2 2.75) (layers F.Cu F.Paste F.Mask))
(pad S2 smd rect (at 10.35 -4.5) (size 1.2 2.75) (layers F.Cu F.Paste F.Mask))
)

+ 42
- 0
reform2-motherboard/reform2-motherboard/footprints/TE_1775059-1.kicad_mod View File

@@ -0,0 +1,42 @@
(module TE_1775059-1 (layer F.Cu) (tedit 5D128F14)
(attr smd)
(fp_text reference TE_1775059-1 (at -6.8 12.5) (layer F.SilkS)
(effects (font (size 1.00161 1.00161) (thickness 0.05)))
)
(fp_text value VAL** (at -19.0871 28.3829) (layer F.SilkS)
(effects (font (size 1.00063 1.00063) (thickness 0.05)))
)
(fp_line (start -21.7 -2.1) (end 8.9 -2.1) (layer Eco2.User) (width 0.127))
(fp_line (start 8.9 -2.1) (end 8.9 27.15) (layer Eco2.User) (width 0.127))
(fp_line (start 8.9 27.15) (end -21.7 27.15) (layer Eco2.User) (width 0.127))
(fp_line (start -21.7 27.15) (end -21.7 -2.1) (layer Eco2.User) (width 0.127))
(fp_line (start -21.7 -1.5) (end -21.7 -2.1) (layer F.SilkS) (width 0.127))
(fp_line (start -21.7 -2.1) (end 5.5 -2.1) (layer F.SilkS) (width 0.127))
(fp_line (start 8.7 -2.1) (end 8.9 -2.1) (layer F.SilkS) (width 0.127))
(fp_line (start 8.9 -2.1) (end 8.9 27.15) (layer F.SilkS) (width 0.127))
(fp_line (start 8.9 27.15) (end -21.7 27.15) (layer F.SilkS) (width 0.127))
(fp_line (start -21.7 27.15) (end -21.7 22.2) (layer F.SilkS) (width 0.127))
(fp_line (start -21.7 0.5) (end -21.7 1.5) (layer F.SilkS) (width 0.127))
(fp_circle (center -22.55 18.9) (end -22.45 18.9) (layer F.SilkS) (width 0.2))
(fp_line (start 9.15 -2.67) (end 9.15 27.4) (layer Eco1.User) (width 0.05))
(fp_line (start 9.15 27.4) (end -22.25 27.4) (layer Eco1.User) (width 0.05))
(fp_line (start -22.25 27.4) (end -22.25 -2.67) (layer Eco1.User) (width 0.05))
(fp_line (start -22.25 -2.67) (end 9.15 -2.67) (layer Eco1.User) (width 0.05))
(fp_circle (center -21.26 18.9) (end -21.16 18.9) (layer Eco2.User) (width 0.2))
(pad P1 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 1.2) (layers *.Cu *.Mask))
(pad P_SW smd rect (at -2.3 -1.25) (size 1.8 1.45) (layers F.Cu F.Paste F.Mask))
(pad PEG1 smd rect (at 7.1 -1.52) (size 2.8 1.8) (layers F.Cu F.Paste F.Mask))
(pad P2 thru_hole circle (at 5 26.2) (size 1.508 1.508) (drill 1) (layers *.Cu *.Mask))
(pad PEG2 smd rect (at 7.1 25.92) (size 2.8 1.8) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -21.4 21.425) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -21.4 18.925) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -21.4 16.425) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -21.4 13.925) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -21.4 11.425) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -21.4 8.925) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -21.4 6.425) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -21.4 4) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -21.4 2.3) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad D_SW smd rect (at -21.3 -0.07) (size 1.4 0.73) (layers F.Cu F.Paste F.Mask))
(pad SW smd rect (at -21.3 -1.03) (size 1.4 0.73) (layers F.Cu F.Paste F.Mask))
)

+ 85
- 0
reform2-motherboard/reform2-motherboard/footprints/label-mpcie.kicad_mod View File

@@ -0,0 +1,85 @@
(module mnt:mpcie (layer F.Cu) (tedit 0)
(fp_text reference G*** (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_poly (pts (xy -0.877374 -0.654798) (xy -0.859422 -0.654609) (xy -0.720808 -0.642976) (xy -0.610452 -0.615148)
(xy -0.576129 -0.596509) (xy -0.524496 -0.506984) (xy -0.508341 -0.376035) (xy -0.531978 -0.240962)
(xy -0.534297 -0.23473) (xy -0.608176 -0.148444) (xy -0.742821 -0.082377) (xy -0.914982 -0.046246)
(xy -0.994649 -0.042334) (xy -1.18917 -0.042334) (xy -1.161299 -0.201084) (xy -1.126448 -0.400534)
(xy -1.099299 -0.531386) (xy -1.070336 -0.60794) (xy -1.030039 -0.644493) (xy -0.968891 -0.655347)
(xy -0.877374 -0.654798)) (layer F.SilkS) (width 0.01))
(fp_poly (pts (xy 4.826 1.778) (xy -4.783666 1.778) (xy -4.783666 0.904042) (xy -3.937 0.904042)
(xy -3.914381 0.951671) (xy -3.83475 0.97168) (xy -3.772256 0.973666) (xy -3.659986 0.964763)
(xy -3.604925 0.929065) (xy -3.5857 0.878416) (xy -3.570604 0.802198) (xy -3.54481 0.661394)
(xy -3.511708 0.474903) (xy -3.474692 0.261623) (xy -3.467985 0.222487) (xy -3.432129 0.01821)
(xy -3.400667 -0.151069) (xy -3.376495 -0.270495) (xy -3.362508 -0.325213) (xy -3.360868 -0.32698)
(xy -3.350094 -0.283401) (xy -3.328731 -0.172431) (xy -3.299747 -0.010252) (xy -3.266113 0.186955)
(xy -3.261851 0.212533) (xy -3.218419 0.474624) (xy -3.185637 0.664634) (xy -3.159255 0.793826)
(xy -3.135023 0.873465) (xy -3.108689 0.914814) (xy -3.076003 0.929136) (xy -3.032716 0.927697)
(xy -2.993631 0.923323) (xy -2.941771 0.914709) (xy -2.89633 0.892774) (xy -2.849566 0.846667)
(xy -2.793738 0.765536) (xy -2.721104 0.63853) (xy -2.623924 0.454796) (xy -2.531263 0.275166)
(xy -2.423987 0.067722) (xy -2.33135 -0.108817) (xy -2.259639 -0.242684) (xy -2.215139 -0.322111)
(xy -2.203359 -0.338667) (xy -2.209828 -0.291583) (xy -2.228736 -0.176715) (xy -2.257443 -0.009592)
(xy -2.293309 0.194257) (xy -2.307346 0.272981) (xy -2.345465 0.489748) (xy -2.377467 0.678847)
(xy -2.40062 0.823573) (xy -2.41219 0.907221) (xy -2.413 0.918565) (xy -2.373194 0.95866)
(xy -2.257288 0.973607) (xy -2.24703 0.973666) (xy -2.136988 0.966399) (xy -2.083215 0.933135)
(xy -2.069058 0.890719) (xy -1.693333 0.890719) (xy -1.678133 0.945601) (xy -1.617864 0.969476)
(xy -1.527825 0.973666) (xy -1.362316 0.973666) (xy -1.313421 0.66675) (xy -1.28325 0.47862)
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(xy -3.055825 -0.254) (xy -3.094174 -0.485965) (xy -3.127359 -0.686623) (xy -3.153072 -0.842022)
(xy -3.169004 -0.938212) (xy -3.173142 -0.963084) (xy -3.21239 -0.969112) (xy -3.31074 -0.972945)
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(xy -3.634243 -0.859998) (xy -3.659487 -0.731319) (xy -3.693064 -0.550327) (xy -3.732262 -0.332637)
(xy -3.774369 -0.093864) (xy -3.816672 0.150378) (xy -3.85646 0.384474) (xy -3.891021 0.59281)
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(xy -4.783666 -1.778) (xy 4.826 -1.778) (xy 4.826 1.778)) (layer F.SilkS) (width 0.01))
)

+ 142
- 0
reform2-motherboard/reform2-motherboard/footprints/reform2-motherboard.pretty/Conn_TE-M.2-0.5-67P-doublesided.kicad_mod View File

@@ -0,0 +1,142 @@
(module Conn_TE-M.2-0.5-67P-doublesided (layer F.Cu) (tedit 576AD128)
(fp_text reference REF** (at 0 1) (layer F.Fab)
(effects (font (size 0.6 0.6) (thickness 0.1)))
)
(fp_text value VAL** (at 0 0) (layer F.Fab)
(effects (font (size 0.6 0.5) (thickness 0.1)))
)
(fp_line (start 0 110) (end 0 0) (layer F.Fab) (width 0.15))
(fp_text user 110mm (at 6 110) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user 80mm (at 6 80) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user 60mm (at 6 60) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user 42mm (at 6 42) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 60) (end 2 60) (layer F.Fab) (width 0.15))
(fp_circle (center 0 80) (end 2 80) (layer F.Fab) (width 0.15))
(fp_circle (center 0 110) (end 2 110) (layer F.Fab) (width 0.15))
(fp_circle (center 0 42) (end 2 42) (layer F.Fab) (width 0.15))
(fp_text user "ENTRY SIDE" (at 0 3.75) (layer Cmts.User)
(effects (font (size 0.6 0.6) (thickness 0.06)))
)
(fp_line (start -11.25 -6.25) (end 11.25 -6.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -11.25 1.25) (end -11.25 -6.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.25 -6.25) (end 11.25 1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -9.55 -5.25) (end -9.55 -6.2) (layer F.SilkS) (width 0.15))
(fp_line (start -9.55 -6.2) (end -9 -6.2) (layer F.SilkS) (width 0.15))
(fp_line (start 10.95 1.05) (end 10.95 -2.95) (layer F.SilkS) (width 0.15))
(fp_line (start -10.95 1.05) (end -10.95 -2.95) (layer F.SilkS) (width 0.15))
(fp_text user %R (at -10.1 -4.8) (layer Eco1.User)
(effects (font (size 0.3 0.3) (thickness 0.03)))
)
(fp_line (start 10.95 1.05) (end 9.75 1.05) (layer F.SilkS) (width 0.15))
(fp_line (start 9.75 1.05) (end 9.75 2.25) (layer F.SilkS) (width 0.15))
(fp_line (start 9.75 2.25) (end 9.3 2.25) (layer F.SilkS) (width 0.15))
(fp_line (start -9.3 2.25) (end -9.75 2.25) (layer F.SilkS) (width 0.15))
(fp_line (start -9.75 2.25) (end -9.75 1.05) (layer F.SilkS) (width 0.15))
(fp_line (start -9.75 1.05) (end -10.95 1.05) (layer F.SilkS) (width 0.15))
(fp_line (start 11.25 1.25) (end 10 1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 10 1.25) (end 10 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 10 3.25) (end -10 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -10 3.25) (end -10 1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -10 1.25) (end -11.25 1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.95 -5.25) (end -10.95 1.05) (layer F.Fab) (width 0.05))
(fp_line (start 10.95 1.05) (end 10.95 -5.25) (layer F.Fab) (width 0.05))
(fp_line (start -9.75 2.25) (end 9.75 2.25) (layer F.Fab) (width 0.05))
(fp_line (start -10.95 1.05) (end -9.75 1.05) (layer F.Fab) (width 0.05))
(fp_line (start -9.75 1.05) (end -9.75 2.25) (layer F.Fab) (width 0.05))
(fp_line (start 10.95 1.05) (end 9.75 1.05) (layer F.Fab) (width 0.05))
(fp_line (start 9.75 1.05) (end 9.75 2.25) (layer F.Fab) (width 0.05))
(fp_line (start -10.95 -4.75) (end -10.45 -5.25) (layer F.Fab) (width 0.05))
(fp_line (start -10.95 -5.25) (end 10.95 -5.25) (layer F.Fab) (width 0.05))
(pad 19 smd rect (at -4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at -5.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at -5.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -6.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at -5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -5.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -6 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -6.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -7 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -6.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at -4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at -4.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -4 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -3.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at -3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at -2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at -2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 30 smd rect (at -2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at -1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 32 smd rect (at -1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at -1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 34 smd rect (at -1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at -0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 36 smd rect (at -0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at -0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 38 smd rect (at 0 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at 0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 40 smd rect (at 0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 41 smd rect (at 0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 42 smd rect (at 1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 43 smd rect (at 1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 44 smd rect (at 1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 45 smd rect (at 1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 46 smd rect (at 2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 47 smd rect (at 2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 48 smd rect (at 2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 49 smd rect (at 2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 50 smd rect (at 3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 51 smd rect (at 3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 52 smd rect (at 3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 53 smd rect (at 3.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 54 smd rect (at 4 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 55 smd rect (at 4.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 56 smd rect (at 4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 57 smd rect (at 4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 58 smd rect (at 5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 59 smd rect (at 5.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 60 smd rect (at 5.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 61 smd rect (at 5.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 62 smd rect (at 6 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 63 smd rect (at 6.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 64 smd rect (at 6.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 65 smd rect (at 6.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 66 smd rect (at 7 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 67 smd rect (at 7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 68 smd rect (at 7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 69 smd rect (at 7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 70 smd rect (at 8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 71 smd rect (at 8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 72 smd rect (at 8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 73 smd rect (at 8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 74 smd rect (at 9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad 75 smd rect (at 9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask))
(pad "" np_thru_hole circle (at -10 -0.025) (size 1.1 1.1) (drill 1.1) (layers *.Cu))
(pad "" np_thru_hole circle (at 10 -0.025) (size 1.6 1.6) (drill 1.6) (layers *.Cu))
(pad "" smd rect (at -10.35 -4.5) (size 1.2 2.75) (layers F.Cu F.Paste F.Mask))
(pad "" smd rect (at 10.35 -4.5) (size 1.2 2.75) (layers F.Cu F.Paste F.Mask))
(model ../../../../../home/paulr/owncloud.home/Electronics/KiCadLibs/MyKiCadLibs.pretty/M.2_key_B_TE.wrl
(at (xyz 0 0 0))
(scale (xyz 0.3937 0.3937 0.3937))
(rotate (xyz 0 0 0))
)
)

+ 124
- 0
reform2-motherboard/reform2-motherboard/footprints/reform2-motherboard.pretty/mntreform.kicad_mod View File

@@ -0,0 +1,124 @@
(module mntreform (layer F.Cu) (tedit 0)
(fp_text reference G*** (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_poly (pts (xy 10.117124 2.042305) (xy 10.213493 2.068317) (xy 10.2362 2.0828) (xy 10.283474 2.182328)
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(xy -0.296333 0.338666) (xy 15.028334 0.338666) (xy 15.028334 4.826)) (layer F.SilkS) (width 0.01))
)

+ 18
- 11
reform2-motherboard/reform2-motherboard/reform2-display.sch View File

@@ -350,20 +350,16 @@ Wire Wire Line
$Comp
L power:GND #PWR038
U 1 1 5DAA7616
P 6100 3600
F 0 "#PWR038" H 6100 3350 50 0001 C CNN
F 1 "GND" H 6105 3427 50 0000 C CNN
F 2 "" H 6100 3600 50 0001 C CNN
F 3 "" H 6100 3600 50 0001 C CNN
1 6100 3600
P 6100 3450
F 0 "#PWR038" H 6100 3200 50 0001 C CNN
F 1 "GND" H 6105 3277 50 0000 C CNN
F 2 "" H 6100 3450 50 0001 C CNN
F 3 "" H 6100 3450 50 0001 C CNN
1 6100 3450
-1 0 0 1
$EndComp
Wire Wire Line
6100 3600 6100 3650
Wire Wire Line
6100 3650 5900 3650
Text Notes 6250 1500 0 50 ~ 0
TODO: optional 27MHz input for refclk?
Text GLabel 6850 3850 2 50 Input ~ 0
EDP_RESETn
Text GLabel 4250 4650 0 50 Output ~ 0
@@ -452,7 +448,18 @@ Wire Wire Line
Wire Wire Line
7500 5050 6950 5050
Text Notes 6250 1800 0 50 ~ 0
TODO: Manual has "DNI" caps on all EDP pairs
NOTE: Manual has "DNI" caps on all EDP pairs
Text Notes 6250 1950 0 50 ~ 0
TODO: Hook up reset and I2C bus
$Comp
L Device:R_Small R77
U 1 1 60F2545C
P 6100 3550
F 0 "R77" H 6159 3596 50 0000 L CNN
F 1 "0" H 6159 3505 50 0000 L CNN
F 2 "Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2" H 6100 3550 50 0001 C CNN
F 3 "~" H 6100 3550 50 0001 C CNN
1 6100 3550
1 0 0 -1
$EndComp
$EndSCHEMATC

+ 3584
- 1620
reform2-motherboard/reform2-motherboard/reform2-motherboard.kicad_pcb
File diff suppressed because it is too large
View File


+ 65
- 0
reform2-motherboard/reform2-motherboard/reform2-motherboard.sch View File

@@ -694,4 +694,69 @@ Text Notes 1300 950 0 50 ~ 0
TODO: Bootmode / RESET / ONOFF
Text Notes 1300 1100 0 50 ~ 0
TODO: JTAG
Text GLabel 2350 5100 0 50 Input ~ 0
EDP_SCL
Text GLabel 2350 5200 0 50 BiDi ~ 0
EDP_SDA
Wire Wire Line
2350 5100 2500 5100
Wire Wire Line
2500 5200 2350 5200
Text GLabel 2450 11700 0 50 Output ~ 0
USB2_TX_N
Text GLabel 2450 11800 0 50 Output ~ 0
USB2_TX_P
Text GLabel 2450 11900 0 50 Output ~ 0
USB2_DN
Text GLabel 2450 12000 0 50 Output ~ 0
USB2_DP
Text GLabel 2450 11500 0 50 Input ~ 0
USB2_RX_N
Text GLabel 2450 11600 0 50 Input ~ 0
USB2_RX_P
Wire Wire Line
2500 11500 2450 11500
Wire Wire Line
2450 11600 2500 11600
Wire Wire Line
2500 11700 2450 11700
Wire Wire Line
2450 11800 2500 11800
Wire Wire Line
2500 11900 2450 11900
Wire Wire Line
2450 12000 2500 12000
$Comp
L Mechanical:MountingHole H2
U 1 1 61115EAF
P 18750 9400
F 0 "H2" H 18850 9446 50 0000 L CNN
F 1 "LOGO_REFORM" H 18850 9355 50 0000 L CNN
F 2 "reform2-motherboard:mntreform" H 18750 9400 50 0001 C CNN
F 3 "~" H 18750 9400 50 0001 C CNN
1 18750 9400
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H3
U 1 1 611164C9
P 18750 9650
F 0 "H3" H 18850 9696 50 0000 L CNN
F 1 "LABEL_MPCIE1" H 18850 9605 50 0000 L CNN
F 2 "footprints:label-mpcie" H 18750 9650 50 0001 C CNN
F 3 "~" H 18750 9650 50 0001 C CNN
1 18750 9650
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H4
U 1 1 611177F8
P 18750 9900
F 0 "H4" H 18850 9946 50 0000 L CNN
F 1 "LABEL_MPCIE2" H 18850 9855 50 0000 L CNN
F 2 "footprints:label-mpcie" H 18750 9900 50 0001 C CNN
F 3 "~" H 18750 9900 50 0001 C CNN
1 18750 9900
1 0 0 -1
$EndComp
$EndSCHEMATC

+ 502
- 182
reform2-motherboard/reform2-motherboard/reform2-pcie.sch View File

@@ -21,40 +21,38 @@ P 3500 4050
AR Path="/5D1F1F73" Ref="U11" Part="1"
AR Path="/5D06AC46/5D1F1F73" Ref="U11" Part="1"
F 0 "U11" H 3500 5487 60 0000 C CNN
F 1 "MPCIE-Socket" H 3500 5381 60 0000 C CNN
F 1 "679105700" H 3500 5381 60 0000 C CNN
F 2 "footprints:MOLEX_67910-5700" H 3600 3050 60 0001 C CNN
F 3 "" H 3600 3050 60 0000 C CNN
1 3500 4050
1 0 0 -1
$EndComp
Text Notes 4350 1800 0 50 ~ 0
TODO: mSATA controller or M.2 SSD?
$Comp
L power:+3V3 #PWR043
U 1 1 5DABFC96
P 1900 2100
F 0 "#PWR043" H 1900 1950 50 0001 C CNN
F 1 "+3V3" H 1915 2273 50 0000 C CNN
F 2 "" H 1900 2100 50 0001 C CNN
F 3 "" H 1900 2100 50 0001 C CNN
1 1900 2100
P 1900 1650
F 0 "#PWR043" H 1900 1500 50 0001 C CNN
F 1 "+3V3" H 1915 1823 50 0000 C CNN
F 2 "" H 1900 1650 50 0001 C CNN
F 3 "" H 1900 1650 50 0001 C CNN
1 1900 1650
1 0 0 -1
$EndComp
$Comp
L Device:Ferrite_Bead_Small FB3
U 1 1 5DAC08FC
P 1900 2250
F 0 "FB3" H 2000 2296 50 0000 L CNN
F 1 "Ferrite_Bead_Small" H 2000 2205 50 0000 L CNN
F 2 "Inductor_SMD:L_0603_1608Metric" V 1830 2250 50 0001 C CNN
F 3 "~" H 1900 2250 50 0001 C CNN
1 1900 2250
P 1900 1800
F 0 "FB3" H 2000 1846 50 0000 L CNN
F 1 "Ferrite_Bead_Small" H 2000 1755 50 0000 L CNN
F 2 "Inductor_SMD:L_0603_1608Metric" V 1830 1800 50 0001 C CNN
F 3 "~" H 1900 1800 50 0001 C CNN
1 1900 1800
1 0 0 -1
$EndComp
Wire Wire Line
1900 2100 1900 2150
1900 1650 1900 1700
Wire Wire Line
1900 2350 1900 2450
1900 1900 1900 1950
Wire Wire Line
1900 3400 2750 3400
Wire Wire Line
@@ -189,10 +187,6 @@ Wire Wire Line
2400 3800 2850 3800
Wire Wire Line
2850 3900 2400 3900
Text Notes 4350 1950 0 50 ~ 0
TODO: bunch of caps
Text Notes 4350 2100 0 50 ~ 0
TODO: WIFI LEDs
$Comp
L Device:LED_Small D22
U 1 1 5DB65D52
@@ -244,230 +238,556 @@ Wire Wire Line
2400 4900 2850 4900
Wire Wire Line
2850 5000 2400 5000
Text Notes 4350 2250 0 50 ~ 0
Text Notes 3200 1400 0 50 ~ 0
TODO: Latch parts (48099-5701)
$Comp
L reform2-motherboard-rescue:MPCIE-Socket-reform-motherboard-rescue U?
U 1 1 5DB754D8
P 8350 4050
AR Path="/5DB754D8" Ref="U?" Part="1"
AR Path="/5D06AC46/5DB754D8" Ref="U12" Part="1"
F 0 "U12" H 8350 5487 60 0000 C CNN
F 1 "MPCIE-Socket" H 8350 5381 60 0000 C CNN
F 2 "footprints:MOLEX_67910-5700" H 8450 3050 60 0001 C CNN
F 3 "" H 8450 3050 60 0000 C CNN
1 8350 4050
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR047
U 1 1 5DB754E3
P 6750 2100
F 0 "#PWR047" H 6750 1950 50 0001 C CNN
F 1 "+3V3" H 6765 2273 50 0000 C CNN
F 2 "" H 6750 2100 50 0001 C CNN
F 3 "" H 6750 2100 50 0001 C CNN
1 6750 2100
P 7050 1550
F 0 "#PWR047" H 7050 1400 50 0001 C CNN
F 1 "+3V3" H 7065 1723 50 0000 C CNN
F 2 "" H 7050 1550 50 0001 C CNN
F 3 "" H 7050 1550 50 0001 C CNN
1 7050 1550
1 0 0 -1
$EndComp
$Comp
L Device:Ferrite_Bead_Small FB4
U 1 1 5DB754ED
P 6750 2250
F 0 "FB4" H 6850 2296 50 0000 L CNN
F 1 "Ferrite_Bead_Small" H 6850 2205 50 0000 L CNN
F 2 "Inductor_SMD:L_0603_1608Metric" V 6680 2250 50 0001 C CNN
F 3 "~" H 6750 2250 50 0001 C CNN
1 6750 2250
P 7050 1650
F 0 "FB4" H 7150 1696 50 0000 L CNN
F 1 "Ferrite_Bead_Small" H 7150 1605 50 0000 L CNN
F 2 "Inductor_SMD:L_0603_1608Metric" V 6980 1650 50 0001 C CNN
F 3 "~" H 7050 1650 50 0001 C CNN
1 7050 1650
1 0 0 -1
$EndComp
Text GLabel 8100 4300 0 50 Input ~ 0
PCIE2_TX_N
Text GLabel 8100 4000 0 50 Input ~ 0
PCIE2_RX_N
Text GLabel 8100 4400 0 50 Input ~ 0
PCIE2_TX_P
Text GLabel 8100 4100 0 50 Input ~ 0
PCIE2_RX_P
Text GLabel 8100 4600 0 50 Input ~ 0
PCIE2_CLK_N
Text GLabel 8100 4700 0 50 Input ~ 0
PCIE2_CLK_P
$Comp
L Device:C_Small C52
U 1 1 60FC9F01
P 2000 2050
F 0 "C52" H 2092 2096 50 0000 L CNN
F 1 "0.1uF" H 2092 2005 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2000 2050 50 0001 C CNN
F 3 "~" H 2000 2050 50 0001 C CNN
1 2000 2050
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C53
U 1 1 60FCA681
P 2400 2050
F 0 "C53" H 2492 2096 50 0000 L CNN
F 1 "0.1uF" H 2492 2005 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2400 2050 50 0001 C CNN
F 3 "~" H 2400 2050 50 0001 C CNN
1 2400 2050
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C54
U 1 1 60FCAA65
P 2800 2050
F 0 "C54" H 2892 2096 50 0000 L CNN
F 1 "0.1uF" H 2892 2005 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2800 2050 50 0001 C CNN
F 3 "~" H 2800 2050 50 0001 C CNN
1 2800 2050
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C55
U 1 1 60FCACBE
P 3200 2050
F 0 "C55" H 3292 2096 50 0000 L CNN
F 1 "0.1uF" H 3292 2005 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 3200 2050 50 0001 C CNN
F 3 "~" H 3200 2050 50 0001 C CNN
1 3200 2050
1 0 0 -1
$EndComp
$Comp
L Device:CP1_Small C56
U 1 1 60FCBB5A
P 3600 2050
F 0 "C56" H 3691 2096 50 0000 L CNN
F 1 "330uF" H 3691 2005 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_6.3x3" H 3600 2050 50 0001 C CNN
F 3 "~" H 3600 2050 50 0001 C CNN
1 3600 2050
1 0 0 -1
$EndComp
$Comp
L Device:CP1_Small C57
U 1 1 60FCC62A
P 4000 2050
F 0 "C57" H 4091 2096 50 0000 L CNN
F 1 "330uF" H 4091 2005 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_6.3x3" H 4000 2050 50 0001 C CNN
F 3 "~" H 4000 2050 50 0001 C CNN
1 4000 2050
1 0 0 -1
$EndComp
Wire Wire Line
6750 2100 6750 2150
Wire Wire Line
6750 2350 6750 2450
Wire Wire Line
6750 3400 7600 3400
1900 1950 2000 1950
Connection ~ 1900 1950
Wire Wire Line
7600 3400 7600 3500
1900 1950 1900 2450
Connection ~ 2000 1950
Wire Wire Line
7600 3500 7700 3500
Connection ~ 7600 3400
2000 1950 2400 1950
Connection ~ 2400 1950
Wire Wire Line
7600 3400 7700 3400
2400 1950 2800 1950
Connection ~ 2800 1950
Wire Wire Line
6750 2450 9100 2450
2800 1950 3200 1950
Connection ~ 3200 1950
Wire Wire Line
9100 2450 9100 2900
3200 1950 3600 1950
Connection ~ 3600 1950
Wire Wire Line
9100 2900 9000 2900
Connection ~ 6750 2450
3600 1950 4000 1950
Wire Wire Line
6750 2450 6750 3400
4000 2150 3600 2150
Connection ~ 2400 2150
Wire Wire Line
9100 2900 9100 4300
2400 2150 2000 2150
Connection ~ 2800 2150
Wire Wire Line
9100 4300 9000 4300
Connection ~ 9100 2900
2800 2150 2400 2150
Connection ~ 3200 2150
Wire Wire Line
9100 4300 9100 5500
3200 2150 2800 2150
Connection ~ 3600 2150
Wire Wire Line
9100 5500 9000 5500
Connection ~ 9100 4300
3600 2150 3200 2150
$Comp
L power:GND #PWR049
U 1 1 5DB75509
P 9250 5550
F 0 "#PWR049" H 9250 5300 50 0001 C CNN
F 1 "GND" H 9255 5377 50 0000 C CNN
F 2 "" H 9250 5550 50 0001 C CNN
F 3 "" H 9250 5550 50 0001 C CNN
1 9250 5550
L power:GND #PWR0174
U 1 1 60FE4FEC
P 4000 2150
F 0 "#PWR0174" H 4000 1900 50 0001 C CNN
F 1 "GND" H 4005 1977 50 0000 C CNN
F 2 "" H 4000 2150 50 0001 C CNN
F 3 "" H 4000 2150 50 0001 C CNN
1 4000 2150
1 0 0 -1
$EndComp
Connection ~ 4000 2150
Text Notes 3200 1500 0 50 ~ 0
TODO: 1.5V?
Text Notes 8200 1200 0 50 ~ 0
1-2199230-5
Text Notes 8200 1300 0 50 ~ 0
M Key 42H M.2
Text Notes 8200 1400 0 50 ~ 0
2280 formfactor
Text Notes 7000 650 0 50 ~ 0
M.2 footprint by takigama https://github.com/takigama/KiCADComponents
Text Notes 7000 800 0 50 ~ 0
https://superuser.com/questions/946346/are-there-ssds-compatible-with-pcie-x1
$Comp
L reform2:1-2199230-5 J10
U 1 1 610031F1
P 8600 4100
F 0 "J10" H 8600 6065 50 0000 C CNN
F 1 "1-2199230-5" H 8600 5974 50 0000 C CNN
F 2 "footprints:TE_1-2199230-5" H 8600 4100 50 0001 L BNN
F 3 "" H 8600 4100 50 0001 L BNN
F 4 "TE Connectivity" H 8600 4100 50 0001 L BNN "Field4"
F 5 "1-2199230-5" H 8600 4100 50 0001 L BNN "Field5"
F 6 "Conn Edge Dual Fmale 67pos 0.020" H 8600 4100 50 0001 L BNN "Field6"
F 7 "https://www.te.com/usa-en/product-1-2199230-5.html?te_bu=Cor&te_type=disp&te_campaign=seda_glo_cor-seda-global-disp-prtnr-fy19-seda-model-bom-cta_sma-317_1&elqCampaignId=32493" H 8600 4100 50 0001 L BNN "Field7"
F 8 "None" H 8600 4100 50 0001 L BNN "Field8"
F 9 "1-2199230-5" H 8600 4100 50 0001 L BNN "Field9"
F 10 "A124992CT-ND" H 8600 4100 50 0001 L BNN "Field10"
F 11 "https://www.digikey.com/product-detail/en/te-connectivity-amp-connectors/1-2199230-5/A124992CT-ND/6810693?utm_source=snapeda&utm_medium=aggregator&utm_campaign=symbol" H 8600 4100 50 0001 L BNN "Field11"
1 8600 4100
1 0 0 -1
$EndComp
Wire Wire Line
9250 5550 9250 5400
Wire Wire Line
9250 5400 9000 5400
Wire Wire Line
9250 5400 9250 4600
Wire Wire Line
9250 4600 9000 4600
Connection ~ 9250 5400
Wire Wire Line
9250 4600 9250 4200
Wire Wire Line
9250 4200 9000 4200
Connection ~ 9250 4600
Wire Wire Line
9250 4200 9250 3800
Wire Wire Line
9250 3800 9000 3800
Connection ~ 9250 4200
Wire Wire Line
9250 3800 9250 3500
Wire Wire Line
9250 3500 9000 3500
Connection ~ 9250 3800
9750 2400 9100 2400
Text Notes 7000 950 0 50 ~ 0
https://pinoutguide.com/HD/M.2_NGFF_connector_pinout.shtml
Wire Wire Line
9250 3500 9250 3000
9100 2500 9750 2500
Wire Wire Line
9250 3000 9000 3000
Connection ~ 9250 3500
9750 2500 9750 2400
Connection ~ 9750 2400
$Comp
L power:GND #PWR048
U 1 1 5DB75524
P 7450 5550
F 0 "#PWR048" H 7450 5300 50 0001 C CNN
F 1 "GND" H 7455 5377 50 0000 C CNN
F 2 "" H 7450 5550 50 0001 C CNN
F 3 "" H 7450 5550 50 0001 C CNN
1 7450 5550
L power:GND #PWR0175
U 1 1 610114A2
P 7300 2550
F 0 "#PWR0175" H 7300 2300 50 0001 C CNN
F 1 "GND" H 7305 2377 50 0000 C CNN
F 2 "" H 7300 2550 50 0001 C CNN
F 3 "" H 7300 2550 50 0001 C CNN
1 7300 2550
1 0 0 -1
$EndComp
Wire Wire Line
7450 5550 7450 5100
Wire Wire Line
7450 3300 7700 3300
8100 2500 7300 2500
Wire Wire Line
7300 2500 7300 2550
NoConn ~ 8100 2600
NoConn ~ 9100 2600
NoConn ~ 9100 2700
NoConn ~ 8100 2700
NoConn ~ 8100 2800
NoConn ~ 8100 2900
NoConn ~ 9100 3300
NoConn ~ 9100 3400
NoConn ~ 9100 3000
NoConn ~ 9100 3100
NoConn ~ 9100 3200
NoConn ~ 8100 3100
NoConn ~ 8100 3200
NoConn ~ 9100 3900
NoConn ~ 9100 4000
$Comp
L power:GND #PWR0176
U 1 1 6102FA41
P 7300 5800
F 0 "#PWR0176" H 7300 5550 50 0001 C CNN
F 1 "GND" H 7305 5627 50 0000 C CNN
F 2 "" H 7300 5800 50 0001 C CNN
F 3 "" H 7300 5800 50 0001 C CNN
1 7300 5800
1 0 0 -1
$EndComp
Wire Wire Line
7700 3600 7450 3600
Connection ~ 7450 3600
7300 5800 7300 5600
Wire Wire Line
7300 4200 8100 4200
Wire Wire Line
8100 3900 7300 3900
Wire Wire Line
7300 3900 7300 4200
Connection ~ 7300 4200
NoConn ~ 8100 3800
NoConn ~ 8100 3700
NoConn ~ 8100 3500
NoConn ~ 8100 3400
Text Notes 7800 3850 0 50 ~ 0
PETp1
Text Notes 7800 3750 0 50 ~ 0
PETn1
Text Notes 7800 3150 0 50 ~ 0
PETn2
Text Notes 7800 3250 0 50 ~ 0
PETp2
Text Notes 7800 3550 0 50 ~ 0
PERp1
Text Notes 7800 3450 0 50 ~ 0
PERn1
Wire Wire Line
7300 3900 7300 3600
Wire Wire Line
7300 3600 8100 3600
Connection ~ 7300 3900
Wire Wire Line
8100 3300 7300 3300
Wire Wire Line
7300 3300 7300 3600
Connection ~ 7300 3600
Text Notes 7650 3050 0 50 ~ 0
CONFIG_0
Text Notes 7650 2450 0 50 ~ 0
CONFIG_3
Text Label 9100 2800 0 50 ~ 0
M2_DAS_DSS
NoConn ~ 9100 2900
NoConn ~ 9100 3500
NoConn ~ 9100 3600
NoConn ~ 9100 3700
Text Label 9100 3800 0 50 ~ 0
M2_DEVSLP
NoConn ~ 9100 4100
NoConn ~ 9100 4200
NoConn ~ 9100 4300
Text Label 9100 4400 0 50 ~ 0
M2_NPERST
Wire Wire Line
8100 4500 7300 4500
Connection ~ 7300 4500
Wire Wire Line
7300 4500 7300 4200
Wire Wire Line
8100 4800 7300 4800
Connection ~ 7300 4800
Wire Wire Line
7300 4800 7300 4500
NoConn ~ 8100 5100
NoConn ~ 8100 5200
NoConn ~ 8100 5300
NoConn ~ 8100 4900
NoConn ~ 8100 5000
NoConn ~ 9100 4900
NoConn ~ 9100 5000
NoConn ~ 9100 5100
NoConn ~ 9100 5200
Text Label 9100 5300 0 50 ~ 0
M2_SUSCLK
Text Notes 7700 5450 0 50 ~ 0
CONFIG_1
Wire Wire Line
8100 5500 7300 5500
Connection ~ 7300 5500
Wire Wire Line
7300 5500 7300 4800
Wire Wire Line
8100 5600 7300 5600
Connection ~ 7300 5600
Wire Wire Line
7300 5600 7300 5500
Text Notes 7700 5750 0 50 ~ 0
CONFIG_2
Text Label 9100 4600 0 50 ~ 0
M2_NPEWAKE
Text Notes 9700 4600 0 50 ~ 0
Pull Up?
NoConn ~ 9100 4800
NoConn ~ 9100 4700
Wire Wire Line
9750 2500 9750 5400
Wire Wire Line
9750 5400 9100 5400
Connection ~ 9750 2500
Wire Wire Line
9100 5500 9750 5500
Wire Wire Line
9750 5500 9750 5400
Connection ~ 9750 5400
Wire Wire Line
9100 5600 9750 5600
Wire Wire Line
9750 5600 9750 5500
Connection ~ 9750 5500
$Comp
L power:GND #PWR0177
U 1 1 610897DE
P 9300 5900
F 0 "#PWR0177" H 9300 5650 50 0001 C CNN
F 1 "GND" H 9305 5727 50 0000 C CNN
F 2 "" H 9300 5900 50 0001 C CNN
F 3 "" H 9300 5900 50 0001 C CNN
1 9300 5900
1 0 0 -1
$EndComp
Wire Wire Line
7450 3600 7450 3300
9100 5800 9300 5800
Wire Wire Line
7450 3700 7700 3700
Connection ~ 7450 3700
9300 5800 9300 5900
Text GLabel 9850 4400 2 50 Input ~ 0
PCIE_RESETn
Wire Wire Line
7450 3700 7450 3600
9850 4400 9100 4400
$Comp
L Device:C_Small C58
U 1 1 6109426D
P 7400 1900
F 0 "C58" H 7492 1946 50 0000 L CNN
F 1 "0.1uF" H 7492 1855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 7400 1900 50 0001 C CNN
F 3 "~" H 7400 1900 50 0001 C CNN
1 7400 1900
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C59
U 1 1 61094277
P 7800 1900
F 0 "C59" H 7892 1946 50 0000 L CNN
F 1 "0.1uF" H 7892 1855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 7800 1900 50 0001 C CNN
F 3 "~" H 7800 1900 50 0001 C CNN
1 7800 1900
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C60
U 1 1 61094281
P 8200 1900
F 0 "C60" H 8292 1946 50 0000 L CNN
F 1 "0.1uF" H 8292 1855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8200 1900 50 0001 C CNN
F 3 "~" H 8200 1900 50 0001 C CNN
1 8200 1900
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C61
U 1 1 6109428B
P 8600 1900
F 0 "C61" H 8692 1946 50 0000 L CNN
F 1 "0.1uF" H 8692 1855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8600 1900 50 0001 C CNN
F 3 "~" H 8600 1900 50 0001 C CNN
1 8600 1900
1 0 0 -1
$EndComp
$Comp
L Device:CP1_Small C62
U 1 1 61094295
P 9000 1900
F 0 "C62" H 9091 1946 50 0000 L CNN
F 1 "330uF" H 9091 1855 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_6.3x3" H 9000 1900 50 0001 C CNN
F 3 "~" H 9000 1900 50 0001 C CNN
1 9000 1900
1 0 0 -1
$EndComp
$Comp
L Device:CP1_Small C63
U 1 1 6109429F
P 9400 1900
F 0 "C63" H 9491 1946 50 0000 L CNN
F 1 "330uF" H 9491 1855 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_6.3x3" H 9400 1900 50 0001 C CNN
F 3 "~" H 9400 1900 50 0001 C CNN
1 9400 1900
1 0 0 -1
$EndComp
Connection ~ 7400 1800
Wire Wire Line
7700 4000 7450 4000
Connection ~ 7450 4000
7400 1800 7800 1800
Connection ~ 7800 1800
Wire Wire Line
7450 4000 7450 3700
7800 1800 8200 1800
Connection ~ 8200 1800
Wire Wire Line
7450 4100 7700 4100
Connection ~ 7450 4100
8200 1800 8600 1800
Connection ~ 8600 1800
Wire Wire Line
7450 4100 7450 4000
8600 1800 9000 1800
Connection ~ 9000 1800
Wire Wire Line
7700 4400 7450 4400
Connection ~ 7450 4400
9000 1800 9400 1800
Wire Wire Line
7450 4400 7450 4100
9400 2000 9000 2000
Connection ~ 7800 2000
Wire Wire Line
7700 4800 7450 4800
Connection ~ 7450 4800
7800 2000 7400 2000
Connection ~ 8200 2000
Wire Wire Line
7450 4800 7450 4400
8200 2000 7800 2000
Connection ~ 8600 2000
Wire Wire Line
7700 5100 7450 5100
Connection ~ 7450 5100
8600 2000 8200 2000
Connection ~ 9000 2000
Wire Wire Line
7450 5100 7450 4800
Text GLabel 7250 3900 0 50 Input ~ 0
PCIE2_TX_N
Text GLabel 7250 4300 0 50 Input ~ 0
PCIE2_RX_N
Text GLabel 7250 3800 0 50 Input ~ 0
PCIE2_TX_P
Text GLabel 7250 4200 0 50 Input ~ 0
PCIE2_RX_P
9000 2000 8600 2000
$Comp
L power:GND #PWR0178
U 1 1 610942BD
P 9400 2000
F 0 "#PWR0178" H 9400 1750 50 0001 C CNN
F 1 "GND" H 9405 1827 50 0000 C CNN
F 2 "" H 9400 2000 50 0001 C CNN
F 3 "" H 9400 2000 50 0001 C CNN
1 9400 2000
1 0 0 -1
$EndComp
Connection ~ 9400 2000
Wire Wire Line
7250 4200 7700 4200
7050 1800 7050 1750
Wire Wire Line
7700 4300 7250 4300
7050 1800 7400 1800
Wire Wire Line
7250 3800 7700 3800
9400 1800 9750 1800
Wire Wire Line
7700 3900 7250 3900
9750 1800 9750 2400
Connection ~ 9400 1800
$Comp
L Mechanical:MountingHole_Pad H1
U 1 1 610E8506
P 10150 3150
F 0 "H1" H 10250 3199 50 0000 L CNN
F 1 "NGFF-Mount1" H 10250 3108 50 0000 L CNN
F 2 "MountingHole:MountingHole_3.2mm_M3_DIN965_Pad" H 10150 3150 50 0001 C CNN
F 3 "~" H 10150 3150 50 0001 C CNN
1 10150 3150
1 0 0 -1
$EndComp
$Comp
L Device:LED_Small D23
U 1 1 5DB7554F
P 9600 3300
F 0 "D23" H 9600 3535 50 0000 C CNN
F 1 "LED_WLAN1" H 9600 3444 50 0000 C CNN
F 2 "LED_SMD:LED_0603_1608Metric" V 9600 3300 50 0001 C CNN
F 3 "~" V 9600 3300 50 0001 C CNN
1 9600 3300
L power:GND #PWR0179
U 1 1 610E8EF7
P 10150 3400
F 0 "#PWR0179" H 10150 3150 50 0001 C CNN
F 1 "GND" H 10155 3227 50 0000 C CNN
F 2 "" H 10150 3400 50 0001 C CNN
F 3 "" H 10150 3400 50 0001 C CNN
1 10150 3400
1 0 0 -1
$EndComp
Wire Wire Line
9500 3300 9000 3300
10150 3400 10150 3250
$Comp
L Device:R_Small R68
U 1 1 5DB7555A
P 9950 3300
F 0 "R68" V 9754 3300 50 0000 C CNN
F 1 "240" V 9845 3300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" H 9950 3300 50 0001 C CNN
F 3 "~" H 9950 3300 50 0001 C CNN
1 9950 3300
0 1 1 0
L reform2:48099-5701 J11
U 1 1 610F1B47
P 3550 6350
F 0 "J11" H 3550 6665 50 0000 C CNN
F 1 "48099-5701" H 3550 6574 50 0000 C CNN
F 2 "footprints:MOLEX_48099-5701" H 3550 6350 50 0001 L BNN
F 3 "" H 3550 6350 50 0001 L BNN
F 4 "None" H 3550 6350 50 0001 L BNN "Package"
F 5 "LATCH ASSEMBLY, FOR MINI PCI; Accessory Type: Latch; For Use With: 67910 Series Edge Card Connectors" H 3550 6350 50 0001 L BNN "Description"
F 6 "Molex" H 3550 6350 50 0001 L BNN "MF"
F 7 "Good" H 3550 6350 50 0001 L BNN "Availability"
F 8 "1.06 USD" H 3550 6350 50 0001 L BNN "Price"
1 3550 6350
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0180
U 1 1 610F21C1
P 3200 6500
F 0 "#PWR0180" H 3200 6250 50 0001 C CNN
F 1 "GND" H 3205 6327 50 0000 C CNN
F 2 "" H 3200 6500 50 0001 C CNN
F 3 "" H 3200 6500 50 0001 C CNN
1 3200 6500
1 0 0 -1
$EndComp
Wire Wire Line
9850 3300 9700 3300
3200 6500 3200 6400
Wire Wire Line
3200 6400 3350 6400
Wire Wire Line
3350 6300 3200 6300
Wire Wire Line
3200 6300 3200 6400
Connection ~ 3200 6400
$Comp
L power:+3V3 #PWR050
U 1 1 5DB75565
P 10200 3300
F 0 "#PWR050" H 10200 3150 50 0001 C CNN
F 1 "+3V3" H 10215 3473 50 0000 C CNN
F 2 "" H 10200 3300 50 0001 C CNN
F 3 "" H 10200 3300 50 0001 C CNN
1 10200 3300
L power:GND #PWR0181
U 1 1 610F8D93
P 3900 6500
F 0 "#PWR0181" H 3900 6250 50 0001 C CNN
F 1 "GND" H 3905 6327 50 0000 C CNN
F 2 "" H 3900 6500 50 0001 C CNN
F 3 "" H 3900 6500 50 0001 C CNN
1 3900 6500
1 0 0 -1
$EndComp
Wire Wire Line
10200 3300 10050 3300
Text GLabel 9450 4400 2 50 Input ~ 0
PCIE_RESETn
3900 6500 3900 6400
Wire Wire Line
9450 4400 9000 4400
Text GLabel 7250 5000 0 50 Input ~ 0
PCIE2_CLK_N
Text GLabel 7250 4900 0 50 Input ~ 0
PCIE2_CLK_P
3900 6400 3750 6400
Wire Wire Line
7250 4900 7700 4900
3750 6300 3900 6300
Wire Wire Line
7700 5000 7250 5000
3900 6300 3900 6400
Connection ~ 3900 6400
$EndSCHEMATC

+ 839
- 141
reform2-motherboard/reform2-motherboard/reform2-power.sch
File diff suppressed because it is too large
View File


+ 5
- 1
reform2-motherboard/reform2-motherboard/reform2-sd.sch View File

@@ -20,7 +20,7 @@ U 1 1 5D0E6993
P 6200 3450
F 0 "J3" H 6200 4115 50 0000 C CNN
F 1 "SD_Card" H 6200 4024 50 0000 C CNN
F 2 "Connector_Card:SD_Kyocera_145638109511859+" H 6200 3450 50 0001 C CNN
F 2 "footprints:TE_1775059-1" H 6200 3450 50 0001 C CNN
F 3 "http://portal.fciconnect.com/Comergent//fci/drawing/10067847.pdf" H 6200 3450 50 0001 C CNN
1 6200 3450
1 0 0 -1
@@ -147,4 +147,8 @@ Text Notes 5450 2400 0 50 ~ 0
TODO: isolation / level shift?
Text Notes 5450 2550 0 50 ~ 0
TODO: caps
Text Notes 5600 4250 0 50 ~ 0
Replace with Molex 5035000993
Text Notes 5650 4400 0 50 ~ 0
Replace with TE 1775059-1
$EndSCHEMATC

+ 33
- 0
reform2-motherboard/reform2-motherboard/reform2-usb.sch View File

@@ -835,4 +835,37 @@ Text GLabel 1550 5850 2 50 Input ~ 0
USB3_2_VBUS
Text Notes 800 850 0 50 ~ 0
TODO: pullup/down on ENs?
$Comp
L Connector:Conn_01x04_Male J9
U 1 1 60F17696
P 3850 3750
F 0 "J9" H 3958 4031 50 0000 C CNN
F 1 "Conn_01x04_Male" H 3958 3940 50 0000 C CNN
F 2 "Connector_PinHeader_2.00mm:PinHeader_1x04_P2.00mm_Horizontal" H 3850 3750 50 0001 C CNN
F 3 "~" H 3850 3750 50 0001 C CNN
1 3850 3750
1 0 0 -1
$EndComp
Text GLabel 7000 3750 0 50 Input ~ 0
USBH_SCL
Wire Wire Line
7000 3750 7450 3750
Text GLabel 7000 3850 0 50 Input ~ 0
USBH_SDA
Wire Wire Line
7000 3850 7450 3850
Text GLabel 6450 7000 0 50 Output ~ 0
USB2_TX_N
Text GLabel 6450 7100 0 50 Output ~ 0
USB2_TX_P
Text GLabel 6450 7200 0 50 Output ~ 0
USB2_DN
Text GLabel 6450 7300 0 50 Output ~ 0
USB2_DP
Text GLabel 6450 6800 0 50 Input ~ 0
USB2_RX_N
Text GLabel 6450 6900 0 50 Input ~ 0
USB2_RX_P
Text Notes 5900 6700 0 50 ~ 0
TODO: 3rd USB
$EndSCHEMATC

+ 151
- 0
reform2-motherboard/reform2-motherboard/reform2.lib View File

@@ -1,6 +1,157 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 1-2199230-5
#
DEF 1-2199230-5 J 0 40 Y Y 1 L N
F0 "J" -301 1833 50 H V L BNN
F1 "1-2199230-5" -300 -1903 50 H V L BNN
F2 "CONN_1-2199230-5" 0 0 50 H I L BNN
F3 "Compliant" 0 0 50 H I L BNN
F4 "TE Connectivity" 0 0 50 H I L BNN
F5 "1-2199230-5" 0 0 50 H I L BNN
F6 "Conn Edge Dual Fmale 67pos 0.020" 0 0 50 H I L BNN
F7 "https://www.te.com/usa-en/product-1-2199230-5.html?te_bu=Cor&te_type=disp&te_campaign=seda_glo_cor-seda-global-disp-prtnr-fy19-seda-model-bom-cta_sma-317_1&elqCampaignId=32493" 0 0 50 H I L BNN
F8 "None" 0 0 50 H I L BNN
F9 "1-2199230-5" 0 0 50 H I L BNN
F10 "A124992CT-ND" 0 0 50 H I L BNN
F11 "https://www.digikey.com/product-detail/en/te-connectivity-amp-connectors/1-2199230-5/A124992CT-ND/6810693?utm_source=snapeda&utm_medium=aggregator&utm_campaign=symbol" 0 0 50 H I L BNN
DRAW
S -300 1800 300 -1800 1 1 0 f
X 1 1 -500 1700 200 R 40 40 0 0 P
X 10 10 500 1300 200 L 40 40 0 0 P
X 11 11 -500 1200 200 R 40 40 0 0 P
X 2 2 500 1700 200 L 40 40 0 0 P
X 20 20 500 1200 200 L 40 40 0 0 P
X 21 21 -500 1100 200 R 40 40 0 0 P
X 22 22 500 1100 200 L 40 40 0 0 P
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X 24 24 500 1000 200 L 40 40 0 0 P
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X 26 26 500 900 200 L 40 40 0 0 P
X 27 27 -500 800 200 R 40 40 0 0 P
X 28 28 500 800 200 L 40 40 0 0 P
X 29 29 -500 700 200 R 40 40 0 0 P
X 3 3 -500 1600 200 R 40 40 0 0 P
X 30 30 500 700 200 L 40 40 0 0 P
X 31 31 -500 600 200 R 40 40 0 0 P
X 32 32 500 600 200 L 40 40 0 0 P
X 33 33 -500 500 200 R 40 40 0 0 P
X 34 34 500 500 200 L 40 40 0 0 P
X 35 35 -500 400 200 R 40 40 0 0 P
X 36 36 500 400 200 L 40 40 0 0 P
X 37 37 -500 300 200 R 40 40 0 0 P
X 38 38 500 300 200 L 40 40 0 0 P
X 39 39 -500 200 200 R 40 40 0 0 P
X 4 4 500 1600 200 L 40 40 0 0 P
X 40 40 500 200 200 L 40 40 0 0 P
X 41 41 -500 100 200 R 40 40 0 0 P
X 42 42 500 100 200 L 40 40 0 0 P
X 43 43 -500 0 200 R 40 40 0 0 P
X 44 44 500 0 200 L 40 40 0 0 P
X 45 45 -500 -100 200 R 40 40 0 0 P
X 46 46 500 -100 200 L 40 40 0 0 P
X 47 47 -500 -200 200 R 40 40 0 0 P
X 48 48 500 -200 200 L 40 40 0 0 P
X 49 49 -500 -300 200 R 40 40 0 0 P
X 5 5 -500 1500 200 R 40 40 0 0 P
X 50 50 500 -300 200 L 40 40 0 0 P
X 51 51 -500 -400 200 R 40 40 0 0 P
X 52 52 500 -400 200 L 40 40 0 0 P
X 53 53 -500 -500 200 R 40 40 0 0 P
X 54 54 500 -500 200 L 40 40 0 0 P
X 55 55 -500 -600 200 R 40 40 0 0 P
X 56 56 500 -600 200 L 40 40 0 0 P
X 57 57 -500 -700 200 R 40 40 0 0 P
X 58 58 500 -700 200 L 40 40 0 0 P
X 59 59 -500 -800 200 R 40 40 0 0 P
X 6 6 500 1500 200 L 40 40 0 0 P
X 60 60 500 -800 200 L 40 40 0 0 P
X 61 61 -500 -900 200 R 40 40 0 0 P
X 62 62 500 -900 200 L 40 40 0 0 P
X 63 63 -500 -1000 200 R 40 40 0 0 P
X 64 64 500 -1000 200 L 40 40 0 0 P
X 65 65 -500 -1100 200 R 40 40 0 0 P
X 66 66 500 -1100 200 L 40 40 0 0 P
X 67 67 -500 -1200 200 R 40 40 0 0 P
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X 7 7 -500 1400 200 R 40 40 0 0 P
X 70 70 500 -1300 200 L 40 40 0 0 P
X 71 71 -500 -1400 200 R 40 40 0 0 P
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X 73 73 -500 -1500 200 R 40 40 0 0 P
X 74 74 500 -1500 200 L 40 40 0 0 P
X 75 75 -500 -1600 200 R 40 40 0 0 P
X 8 8 500 1400 200 L 40 40 0 0 P
X 9 9 -500 1300 200 R 40 40 0 0 P
X SHIELD S1 500 -1700 200 L 40 40 0 0 P
X SHIELD S2 500 -1700 200 L 40 40 0 0 P
ENDDRAW
ENDDEF
#
# 1775059-1
#
DEF 1775059-1 J 0 40 Y Y 1 L N
F0 "J" -591 561 50 H V L BNN
F1 "1775059-1" -600 -700 50 H V L BNN
F2 "TE_1775059-1" 0 0 50 H I L BNN
F3 "TE Connectivity" 0 0 50 H I L BNN
F4 "SD CONN RVS PUSH-PUSH" 0 0 50 H I L BNN
F5 "Unavailable" 0 0 50 H I L BNN
F6 "1775059-1" 0 0 50 H I L BNN
F7 "None" 0 0 50 H I L BNN
F8 "https://www.te.com/usa-en/product-1775059-1.html?te_bu=Cor&te_type=disp&te_campaign=seda_glo_cor-seda-global-disp-prtnr-fy19-seda-model-bom-cta_sma-317_1&elqCampaignId=32493" 0 0 50 H I L BNN
F9 "1775059-1" 0 0 50 H I L BNN
F10 "None" 0 0 50 H I L BNN
DRAW
P 2 0 0 10 -600 -600 -600 500 N
P 2 0 0 10 -600 500 600 500 N
P 2 0 0 10 600 -600 -600 -600 N
P 2 0 0 10 600 500 600 -600 N
X CD/DAT3 1 800 -100 200 L 40 40 0 0 B
X CMD 2 -800 200 200 R 40 40 0 0 I
X VSS 3 800 -500 200 L 40 40 0 0 W
X VDD 4 800 400 200 L 40 40 0 0 W
X CLK 5 -800 300 200 R 40 40 0 0 I C
X VSS 6 800 -500 200 L 40 40 0 0 W
X DAT0 7 800 200 200 L 40 40 0 0 B
X DAT1 8 800 100 200 L 40 40 0 0 B
X DAT2 9 800 0 200 L 40 40 0 0 B
X DETECT_SW D_SW -800 -100 200 R 40 40 0 0 P
X SHIELD P1 800 -300 200 L 40 40 0 0 P
X SHIELD P2 800 -300 200 L 40 40 0 0 P
X SHIELD PEG1 800 -300 200 L 40 40 0 0 P
X SHIELD PEG2 800 -300 200 L 40 40 0 0 P
X PROTECT_SW P_SW -800 -200 200 R 40 40 0 0 P
X SWITCH SW -800 0 200 R 40 40 0 0 P
ENDDRAW
ENDDEF
#
# 48099-5701
#
DEF 48099-5701 J 0 40 Y N 1 L N
F0 "J" -120 171 50 H V L BNN
F1 "48099-5701" -130 -221 50 H V L BNN
F2 "MOLEX_48099-5701" 0 0 50 H I L BNN
F3 "48099-5701" 0 0 50 H I L BNN
F4 "None" 0 0 50 H I L BNN "Package"
F5 "LATCH ASSEMBLY, FOR MINI PCI; Accessory Type: Latch; For Use With: 67910 Series Edge Card Connectors" 0 0 50 H I L BNN "Description"
F6 "Molex" 0 0 50 H I L BNN "MF"
F7 "Good" 0 0 50 H I L BNN "Availability"
F8 "1.06 USD" 0 0 50 H I L BNN "Price"
DRAW
P 2 0 0 6 -100 -150 -100 150 N
P 2 0 0 6 -100 150 100 150 N
P 2 0 0 6 100 -150 -100 -150 N
P 2 0 0 6 100 150 100 -150 N
X 1 1 -200 50 100 R 40 40 0 0 P
X 2 2 -200 -50 100 R 40 40 0 0 P
X 3 3 200 -50 100 L 40 40 0 0 P
X 4 4 200 50 100 L 40 40 0 0 P
ENDDRAW
ENDDEF
#
# CM2020-00TR
#
DEF CM2020-00TR U? 0 40 Y Y 1 F N


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