Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. /*
  2. * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * The following Boot Header format/structures and values are defined in the
  7. * following documents:
  8. * * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
  9. * * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
  10. *
  11. * Expected Header Size = 0x8C0
  12. * Forced as 'little' endian, 32-bit words
  13. *
  14. * 0x 0 - Interrupt Table (8 words)
  15. * ... (Default value = 0xeafffffe)
  16. * 0x 1f
  17. * 0x 20 - Width Detection
  18. * * DEFAULT_WIDTHDETECTION 0xaa995566
  19. * 0x 24 - Image Identifier
  20. * * DEFAULT_IMAGEIDENTIFIER 0x584c4e58
  21. * 0x 28 - Encryption
  22. * * 0x00000000 - None
  23. * * 0xa5c3c5a3 - eFuse
  24. * * 0x3a5c3c5a - bbRam
  25. * 0x 2C - User Field
  26. * 0x 30 - Image Offset
  27. * 0x 34 - Image Size
  28. * 0x 38 - Reserved (0x00000000) (according to spec)
  29. * * FSBL defines this field for Image Destination Address.
  30. * 0x 3C - Image Load
  31. * 0x 40 - Image Stored Size
  32. * 0x 44 - Reserved (0x00000000) (according to spec)
  33. * * FSBL defines this field for QSPI configuration Data.
  34. * 0x 48 - Checksum
  35. * 0x 4c - Unused (21 words)
  36. * ...
  37. * 0x 9c
  38. * 0x a0 - Register Initialization, 256 Address and Data word pairs
  39. * * List is terminated with an address of 0xffffffff or
  40. * ... * at the max number of entries
  41. * 0x89c
  42. * 0x8a0 - Unused (8 words)
  43. * ...
  44. * 0x8bf
  45. * 0x8c0 - Data/Image starts here or above
  46. */
  47. #include "imagetool.h"
  48. #include "mkimage.h"
  49. #include <image.h>
  50. #define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
  51. #define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
  52. #define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
  53. #define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
  54. enum {
  55. ENCRYPTION_EFUSE = 0xa5c3c5a3,
  56. ENCRYPTION_BBRAM = 0x3a5c3c5a,
  57. ENCRYPTION_NONE = 0x0,
  58. };
  59. struct zynq_reginit {
  60. uint32_t address;
  61. uint32_t data;
  62. };
  63. #define HEADER_INTERRUPT_VECTORS 8
  64. #define HEADER_REGINITS 256
  65. struct zynq_header {
  66. uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
  67. uint32_t width_detection; /* 0x20 */
  68. uint32_t image_identifier; /* 0x24 */
  69. uint32_t encryption; /* 0x28 */
  70. uint32_t user_field; /* 0x2c */
  71. uint32_t image_offset; /* 0x30 */
  72. uint32_t image_size; /* 0x34 */
  73. uint32_t __reserved1; /* 0x38 */
  74. uint32_t image_load; /* 0x3c */
  75. uint32_t image_stored_size; /* 0x40 */
  76. uint32_t __reserved2; /* 0x44 */
  77. uint32_t checksum; /* 0x48 */
  78. uint32_t __reserved3[21]; /* 0x4c */
  79. struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
  80. uint32_t __reserved4[8]; /* 0x8a0 */
  81. };
  82. static struct zynq_header zynqimage_header;
  83. static uint32_t zynqimage_checksum(struct zynq_header *ptr)
  84. {
  85. uint32_t checksum = 0;
  86. if (ptr == NULL)
  87. return 0;
  88. checksum += le32_to_cpu(ptr->width_detection);
  89. checksum += le32_to_cpu(ptr->image_identifier);
  90. checksum += le32_to_cpu(ptr->encryption);
  91. checksum += le32_to_cpu(ptr->user_field);
  92. checksum += le32_to_cpu(ptr->image_offset);
  93. checksum += le32_to_cpu(ptr->image_size);
  94. checksum += le32_to_cpu(ptr->__reserved1);
  95. checksum += le32_to_cpu(ptr->image_load);
  96. checksum += le32_to_cpu(ptr->image_stored_size);
  97. checksum += le32_to_cpu(ptr->__reserved2);
  98. checksum = ~checksum;
  99. return cpu_to_le32(checksum);
  100. }
  101. static void zynqimage_default_header(struct zynq_header *ptr)
  102. {
  103. int i;
  104. if (ptr == NULL)
  105. return;
  106. ptr->width_detection = HEADER_WIDTHDETECTION;
  107. ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
  108. ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
  109. /* Setup not-supported/constant/reserved fields */
  110. for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
  111. ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
  112. for (i = 0; i < HEADER_REGINITS; i++) {
  113. ptr->register_init[i].address = HEADER_REGINIT_NULL;
  114. ptr->register_init[i].data = HEADER_REGINIT_NULL;
  115. }
  116. /*
  117. * Certain reserved fields are required to be set to 0, ensure they are
  118. * set as such.
  119. */
  120. ptr->__reserved1 = 0x0;
  121. ptr->__reserved2 = 0x0;
  122. }
  123. /* mkimage glue functions */
  124. static int zynqimage_verify_header(unsigned char *ptr, int image_size,
  125. struct image_tool_params *params)
  126. {
  127. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  128. if (image_size < sizeof(struct zynq_header))
  129. return -1;
  130. if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
  131. return -1;
  132. if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
  133. return -1;
  134. if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
  135. return -1;
  136. return 0;
  137. }
  138. static void zynqimage_print_header(const void *ptr)
  139. {
  140. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  141. int i;
  142. printf("Image Type : Xilinx Zynq Boot Image support\n");
  143. printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
  144. printf("Image Size : %lu bytes (%lu bytes packed)\n",
  145. (unsigned long)le32_to_cpu(zynqhdr->image_size),
  146. (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
  147. printf("Image Load : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
  148. printf("User Field : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
  149. printf("Checksum : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
  150. for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
  151. if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
  152. continue;
  153. printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
  154. le32_to_cpu(zynqhdr->interrupt_vectors[i]));
  155. }
  156. for (i = 0; i < HEADER_REGINITS; i++) {
  157. if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
  158. break;
  159. if (i == 0)
  160. printf("Custom Register Initialization:\n");
  161. printf(" @ 0x%08x -> 0x%08x\n",
  162. le32_to_cpu(zynqhdr->register_init[i].address),
  163. le32_to_cpu(zynqhdr->register_init[i].data));
  164. }
  165. }
  166. static int zynqimage_check_params(struct image_tool_params *params)
  167. {
  168. if (!params)
  169. return 0;
  170. if (params->addr != 0x0) {
  171. fprintf(stderr, "Error: Load Address cannot be specified.\n");
  172. return -1;
  173. }
  174. /*
  175. * If the entry point is specified ensure it is 64 byte aligned.
  176. */
  177. if (params->eflag && (params->ep % 64 != 0)) {
  178. fprintf(stderr,
  179. "Error: Entry Point must be aligned to a 64-byte boundary.\n");
  180. return -1;
  181. }
  182. return !(params->lflag || params->dflag);
  183. }
  184. static int zynqimage_check_image_types(uint8_t type)
  185. {
  186. if (type == IH_TYPE_ZYNQIMAGE)
  187. return EXIT_SUCCESS;
  188. return EXIT_FAILURE;
  189. }
  190. static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
  191. const char *filename)
  192. {
  193. FILE *fp;
  194. struct zynq_reginit reginit;
  195. unsigned int reg_count = 0;
  196. int r, err;
  197. struct stat path_stat;
  198. /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
  199. fp = fopen(filename, "r");
  200. if (!fp) {
  201. fprintf(stderr, "Cannot open initparams file: %s\n", filename);
  202. exit(1);
  203. }
  204. err = fstat(fileno(fp), &path_stat);
  205. if (err) {
  206. fclose(fp);
  207. return;
  208. }
  209. if (!S_ISREG(path_stat.st_mode)) {
  210. fclose(fp);
  211. return;
  212. }
  213. do {
  214. r = fscanf(fp, "%x %x", &reginit.address, &reginit.data);
  215. if (r == 2) {
  216. zynqhdr->register_init[reg_count] = reginit;
  217. ++reg_count;
  218. }
  219. r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
  220. } while ((r != EOF) && (reg_count < HEADER_REGINITS));
  221. fclose(fp);
  222. }
  223. static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
  224. struct image_tool_params *params)
  225. {
  226. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  227. zynqimage_default_header(zynqhdr);
  228. /* place image directly after header */
  229. zynqhdr->image_offset =
  230. cpu_to_le32((uint32_t)sizeof(struct zynq_header));
  231. zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
  232. zynqhdr->image_stored_size = zynqhdr->image_size;
  233. zynqhdr->image_load = 0x0;
  234. if (params->eflag)
  235. zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
  236. /* User can pass in text file with init list */
  237. if (strlen(params->imagename2))
  238. zynqimage_parse_initparams(zynqhdr, params->imagename2);
  239. zynqhdr->checksum = zynqimage_checksum(zynqhdr);
  240. }
  241. U_BOOT_IMAGE_TYPE(
  242. zynqimage,
  243. "Xilinx Zynq Boot Image support",
  244. sizeof(struct zynq_header),
  245. (void *)&zynqimage_header,
  246. zynqimage_check_params,
  247. zynqimage_verify_header,
  248. zynqimage_print_header,
  249. zynqimage_set_header,
  250. NULL,
  251. zynqimage_check_image_types,
  252. NULL,
  253. NULL
  254. );