Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
This repo is archived. You can view files and clone it, but cannot push or open issues/pull-requests.
 
 
 
 
 
 

201 lines
4.8 KiB

  1. /*
  2. * (C) Copyright 2009
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef _IMXIMAGE_H_
  8. #define _IMXIMAGE_H_
  9. #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */
  10. #define MAX_PLUGIN_CODE_SIZE (64 * 1024)
  11. #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */
  12. #define APP_CODE_BARKER 0xB1
  13. #define DCD_BARKER 0xB17219E9
  14. /*
  15. * NOTE: This file must be kept in sync with arch/arm/include/asm/\
  16. * imx-common/imximage.cfg because tools/imximage.c can not
  17. * cross-include headers from arch/arm/ and vice-versa.
  18. */
  19. #define CMD_DATA_STR "DATA"
  20. /* Initial Vector Table Offset */
  21. #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF
  22. #define FLASH_OFFSET_STANDARD 0x400
  23. #define FLASH_OFFSET_NAND FLASH_OFFSET_STANDARD
  24. #define FLASH_OFFSET_SD FLASH_OFFSET_STANDARD
  25. #define FLASH_OFFSET_SPI FLASH_OFFSET_STANDARD
  26. #define FLASH_OFFSET_ONENAND 0x100
  27. #define FLASH_OFFSET_NOR 0x1000
  28. #define FLASH_OFFSET_SATA FLASH_OFFSET_STANDARD
  29. #define FLASH_OFFSET_QSPI 0x1000
  30. /* Initial Load Region Size */
  31. #define FLASH_LOADSIZE_UNDEFINED 0xFFFFFFFF
  32. #define FLASH_LOADSIZE_STANDARD 0x1000
  33. #define FLASH_LOADSIZE_NAND FLASH_LOADSIZE_STANDARD
  34. #define FLASH_LOADSIZE_SD FLASH_LOADSIZE_STANDARD
  35. #define FLASH_LOADSIZE_SPI FLASH_LOADSIZE_STANDARD
  36. #define FLASH_LOADSIZE_ONENAND 0x400
  37. #define FLASH_LOADSIZE_NOR 0x0 /* entire image */
  38. #define FLASH_LOADSIZE_SATA FLASH_LOADSIZE_STANDARD
  39. #define FLASH_LOADSIZE_QSPI 0x0 /* entire image */
  40. /* Command tags and parameters */
  41. #define IVT_HEADER_TAG 0xD1
  42. #define IVT_VERSION 0x40
  43. #define DCD_HEADER_TAG 0xD2
  44. #define DCD_VERSION 0x40
  45. #define DCD_WRITE_DATA_COMMAND_TAG 0xCC
  46. #define DCD_WRITE_DATA_PARAM 0x4
  47. #define DCD_WRITE_CLR_BIT_PARAM 0xC
  48. #define DCD_WRITE_SET_BIT_PARAM 0x1C
  49. #define DCD_CHECK_DATA_COMMAND_TAG 0xCF
  50. #define DCD_CHECK_BITS_SET_PARAM 0x14
  51. #define DCD_CHECK_BITS_CLR_PARAM 0x04
  52. enum imximage_cmd {
  53. CMD_INVALID,
  54. CMD_IMAGE_VERSION,
  55. CMD_BOOT_FROM,
  56. CMD_BOOT_OFFSET,
  57. CMD_WRITE_DATA,
  58. CMD_WRITE_CLR_BIT,
  59. CMD_WRITE_SET_BIT,
  60. CMD_CHECK_BITS_SET,
  61. CMD_CHECK_BITS_CLR,
  62. CMD_CSF,
  63. CMD_PLUGIN,
  64. };
  65. enum imximage_fld_types {
  66. CFG_INVALID = -1,
  67. CFG_COMMAND,
  68. CFG_REG_SIZE,
  69. CFG_REG_ADDRESS,
  70. CFG_REG_VALUE
  71. };
  72. enum imximage_version {
  73. IMXIMAGE_VER_INVALID = -1,
  74. IMXIMAGE_V1 = 1,
  75. IMXIMAGE_V2
  76. };
  77. typedef struct {
  78. uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
  79. uint32_t addr; /* Address to write to */
  80. uint32_t value; /* Data to write */
  81. } dcd_type_addr_data_t;
  82. typedef struct {
  83. uint32_t barker; /* Barker for sanity check */
  84. uint32_t length; /* Device configuration length (without preamble) */
  85. } dcd_preamble_t;
  86. typedef struct {
  87. dcd_preamble_t preamble;
  88. dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
  89. } dcd_v1_t;
  90. typedef struct {
  91. uint32_t app_code_jump_vector;
  92. uint32_t app_code_barker;
  93. uint32_t app_code_csf;
  94. uint32_t dcd_ptr_ptr;
  95. uint32_t super_root_key;
  96. uint32_t dcd_ptr;
  97. uint32_t app_dest_ptr;
  98. } flash_header_v1_t;
  99. typedef struct {
  100. uint32_t length; /* Length of data to be read from flash */
  101. } flash_cfg_parms_t;
  102. typedef struct {
  103. flash_header_v1_t fhdr;
  104. dcd_v1_t dcd_table;
  105. flash_cfg_parms_t ext_header;
  106. } imx_header_v1_t;
  107. typedef struct {
  108. uint32_t addr;
  109. uint32_t value;
  110. } dcd_addr_data_t;
  111. typedef struct {
  112. uint8_t tag;
  113. uint16_t length;
  114. uint8_t version;
  115. } __attribute__((packed)) ivt_header_t;
  116. typedef struct {
  117. uint8_t tag;
  118. uint16_t length;
  119. uint8_t param;
  120. } __attribute__((packed)) write_dcd_command_t;
  121. struct dcd_v2_cmd {
  122. write_dcd_command_t write_dcd_command;
  123. dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
  124. };
  125. typedef struct {
  126. ivt_header_t header;
  127. struct dcd_v2_cmd dcd_cmd;
  128. uint32_t padding[1]; /* end up on an 8-byte boundary */
  129. } dcd_v2_t;
  130. typedef struct {
  131. uint32_t start;
  132. uint32_t size;
  133. uint32_t plugin;
  134. } boot_data_t;
  135. typedef struct {
  136. ivt_header_t header;
  137. uint32_t entry;
  138. uint32_t reserved1;
  139. uint32_t dcd_ptr;
  140. uint32_t boot_data_ptr;
  141. uint32_t self;
  142. uint32_t csf;
  143. uint32_t reserved2;
  144. } flash_header_v2_t;
  145. typedef struct {
  146. flash_header_v2_t fhdr;
  147. boot_data_t boot_data;
  148. union {
  149. dcd_v2_t dcd_table;
  150. char plugin_code[MAX_PLUGIN_CODE_SIZE];
  151. } data;
  152. } imx_header_v2_t;
  153. /* The header must be aligned to 4k on MX53 for NAND boot */
  154. struct imx_header {
  155. union {
  156. imx_header_v1_t hdr_v1;
  157. imx_header_v2_t hdr_v2;
  158. } header;
  159. };
  160. typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
  161. char *name, int lineno,
  162. int fld, uint32_t value,
  163. uint32_t off);
  164. typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len,
  165. int32_t cmd);
  166. typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
  167. uint32_t dcd_len,
  168. char *name, int lineno);
  169. typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
  170. uint32_t entry_point, uint32_t flash_offset);
  171. #endif /* _IMXIMAGE_H_ */