Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. /*
  2. * (C) Copyright 2009
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  4. *
  5. * (C) Copyright 2008
  6. * Marvell Semiconductor <www.marvell.com>
  7. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. #include "imagetool.h"
  12. #include <image.h>
  13. #include "imximage.h"
  14. #define UNDEFINED 0xFFFFFFFF
  15. /*
  16. * Supported commands for configuration file
  17. */
  18. static table_entry_t imximage_cmds[] = {
  19. {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
  20. {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
  21. {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
  22. {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
  23. {CMD_WRITE_SET_BIT, "SET_BIT", "Reg set bit", },
  24. {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
  25. {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
  26. {CMD_CSF, "CSF", "Command Sequence File", },
  27. {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
  28. {CMD_PLUGIN, "PLUGIN", "file plugin_addr", },
  29. {-1, "", "", },
  30. };
  31. /*
  32. * Supported Boot options for configuration file
  33. * this is needed to set the correct flash offset
  34. */
  35. static table_entry_t imximage_boot_offset[] = {
  36. {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
  37. {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
  38. {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
  39. {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
  40. {FLASH_OFFSET_SD, "sd", "SD Card", },
  41. {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
  42. {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
  43. {-1, "", "Invalid", },
  44. };
  45. /*
  46. * Supported Boot options for configuration file
  47. * this is needed to determine the initial load size
  48. */
  49. static table_entry_t imximage_boot_loadsize[] = {
  50. {FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
  51. {FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
  52. {FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
  53. {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
  54. {FLASH_LOADSIZE_SD, "sd", "SD Card", },
  55. {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
  56. {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
  57. {-1, "", "Invalid", },
  58. };
  59. /*
  60. * IMXIMAGE version definition for i.MX chips
  61. */
  62. static table_entry_t imximage_versions[] = {
  63. {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
  64. {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
  65. {-1, "", " (Invalid)", },
  66. };
  67. static struct imx_header imximage_header;
  68. static uint32_t imximage_version;
  69. /*
  70. * Image Vector Table Offset
  71. * Initialized to a wrong not 4-bytes aligned address to
  72. * check if it is was set by the cfg file.
  73. */
  74. static uint32_t imximage_ivt_offset = UNDEFINED;
  75. static uint32_t imximage_csf_size = UNDEFINED;
  76. /* Initial Load Region Size */
  77. static uint32_t imximage_init_loadsize;
  78. static uint32_t imximage_iram_free_start;
  79. static uint32_t imximage_plugin_size;
  80. static uint32_t plugin_image;
  81. static set_dcd_val_t set_dcd_val;
  82. static set_dcd_param_t set_dcd_param;
  83. static set_dcd_rst_t set_dcd_rst;
  84. static set_imx_hdr_t set_imx_hdr;
  85. static uint32_t max_dcd_entries;
  86. static uint32_t *header_size_ptr;
  87. static uint32_t *csf_ptr;
  88. static uint32_t get_cfg_value(char *token, char *name, int linenr)
  89. {
  90. char *endptr;
  91. uint32_t value;
  92. errno = 0;
  93. value = strtoul(token, &endptr, 16);
  94. if (errno || (token == endptr)) {
  95. fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
  96. name, linenr, token);
  97. exit(EXIT_FAILURE);
  98. }
  99. return value;
  100. }
  101. static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
  102. {
  103. imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
  104. imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
  105. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  106. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  107. /* Try to detect V1 */
  108. if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
  109. (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
  110. return IMXIMAGE_V1;
  111. /* Try to detect V2 */
  112. if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
  113. (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
  114. return IMXIMAGE_V2;
  115. if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
  116. hdr_v2->boot_data.plugin)
  117. return IMXIMAGE_V2;
  118. return IMXIMAGE_VER_INVALID;
  119. }
  120. static void err_imximage_version(int version)
  121. {
  122. fprintf(stderr,
  123. "Error: Unsupported imximage version:%d\n", version);
  124. exit(EXIT_FAILURE);
  125. }
  126. static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
  127. int fld, uint32_t value, uint32_t off)
  128. {
  129. dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
  130. switch (fld) {
  131. case CFG_REG_SIZE:
  132. /* Byte, halfword, word */
  133. if ((value != 1) && (value != 2) && (value != 4)) {
  134. fprintf(stderr, "Error: %s[%d] - "
  135. "Invalid register size " "(%d)\n",
  136. name, lineno, value);
  137. exit(EXIT_FAILURE);
  138. }
  139. dcd_v1->addr_data[off].type = value;
  140. break;
  141. case CFG_REG_ADDRESS:
  142. dcd_v1->addr_data[off].addr = value;
  143. break;
  144. case CFG_REG_VALUE:
  145. dcd_v1->addr_data[off].value = value;
  146. break;
  147. default:
  148. break;
  149. }
  150. }
  151. static struct dcd_v2_cmd *gd_last_cmd;
  152. static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  153. int32_t cmd)
  154. {
  155. dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
  156. struct dcd_v2_cmd *d = gd_last_cmd;
  157. struct dcd_v2_cmd *d2;
  158. int len;
  159. if (!d)
  160. d = &dcd_v2->dcd_cmd;
  161. d2 = d;
  162. len = be16_to_cpu(d->write_dcd_command.length);
  163. if (len > 4)
  164. d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
  165. switch (cmd) {
  166. case CMD_WRITE_DATA:
  167. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  168. (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
  169. break;
  170. d = d2;
  171. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  172. d->write_dcd_command.length = cpu_to_be16(4);
  173. d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
  174. break;
  175. case CMD_WRITE_CLR_BIT:
  176. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  177. (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
  178. break;
  179. d = d2;
  180. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  181. d->write_dcd_command.length = cpu_to_be16(4);
  182. d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
  183. break;
  184. case CMD_WRITE_SET_BIT:
  185. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  186. (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
  187. break;
  188. d = d2;
  189. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  190. d->write_dcd_command.length = cpu_to_be16(4);
  191. d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
  192. break;
  193. /*
  194. * Check data command only supports one entry,
  195. */
  196. case CMD_CHECK_BITS_SET:
  197. d = d2;
  198. d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
  199. d->write_dcd_command.length = cpu_to_be16(4);
  200. d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
  201. break;
  202. case CMD_CHECK_BITS_CLR:
  203. d = d2;
  204. d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
  205. d->write_dcd_command.length = cpu_to_be16(4);
  206. d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
  207. break;
  208. default:
  209. break;
  210. }
  211. gd_last_cmd = d;
  212. }
  213. static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
  214. int fld, uint32_t value, uint32_t off)
  215. {
  216. struct dcd_v2_cmd *d = gd_last_cmd;
  217. int len;
  218. len = be16_to_cpu(d->write_dcd_command.length);
  219. off = (len - 4) >> 3;
  220. switch (fld) {
  221. case CFG_REG_ADDRESS:
  222. d->addr_data[off].addr = cpu_to_be32(value);
  223. break;
  224. case CFG_REG_VALUE:
  225. d->addr_data[off].value = cpu_to_be32(value);
  226. off++;
  227. d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
  228. break;
  229. default:
  230. break;
  231. }
  232. }
  233. /*
  234. * Complete setting up the rest field of DCD of V1
  235. * such as barker code and DCD data length.
  236. */
  237. static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
  238. char *name, int lineno)
  239. {
  240. dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
  241. dcd_v1->preamble.barker = DCD_BARKER;
  242. dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
  243. }
  244. /*
  245. * Complete setting up the reset field of DCD of V2
  246. * such as DCD tag, version, length, etc.
  247. */
  248. static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  249. char *name, int lineno)
  250. {
  251. if (!imxhdr->header.hdr_v2.boot_data.plugin) {
  252. dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
  253. struct dcd_v2_cmd *d = gd_last_cmd;
  254. int len;
  255. if (!d)
  256. d = &dcd_v2->dcd_cmd;
  257. len = be16_to_cpu(d->write_dcd_command.length);
  258. if (len > 4)
  259. d = (struct dcd_v2_cmd *)(((char *)d) + len);
  260. len = (char *)d - (char *)&dcd_v2->header;
  261. dcd_v2->header.tag = DCD_HEADER_TAG;
  262. dcd_v2->header.length = cpu_to_be16(len);
  263. dcd_v2->header.version = DCD_VERSION;
  264. }
  265. }
  266. static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
  267. uint32_t entry_point, uint32_t flash_offset)
  268. {
  269. imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
  270. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  271. dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
  272. uint32_t hdr_base;
  273. uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
  274. - ((char *)imxhdr));
  275. /* Set magic number */
  276. fhdr_v1->app_code_barker = APP_CODE_BARKER;
  277. hdr_base = entry_point - imximage_init_loadsize + flash_offset;
  278. fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
  279. fhdr_v1->app_code_jump_vector = entry_point;
  280. fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
  281. fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
  282. /* Security feature are not supported */
  283. fhdr_v1->app_code_csf = 0;
  284. fhdr_v1->super_root_key = 0;
  285. header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
  286. }
  287. static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  288. uint32_t entry_point, uint32_t flash_offset)
  289. {
  290. imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
  291. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  292. uint32_t hdr_base;
  293. /* Set magic number */
  294. fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
  295. fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
  296. fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
  297. if (!hdr_v2->boot_data.plugin) {
  298. fhdr_v2->entry = entry_point;
  299. fhdr_v2->reserved1 = 0;
  300. fhdr_v2->reserved1 = 0;
  301. hdr_base = entry_point - imximage_init_loadsize +
  302. flash_offset;
  303. fhdr_v2->self = hdr_base;
  304. if (dcd_len > 0)
  305. fhdr_v2->dcd_ptr = hdr_base +
  306. offsetof(imx_header_v2_t, data);
  307. else
  308. fhdr_v2->dcd_ptr = 0;
  309. fhdr_v2->boot_data_ptr = hdr_base
  310. + offsetof(imx_header_v2_t, boot_data);
  311. hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
  312. fhdr_v2->csf = 0;
  313. header_size_ptr = &hdr_v2->boot_data.size;
  314. csf_ptr = &fhdr_v2->csf;
  315. } else {
  316. imx_header_v2_t *next_hdr_v2;
  317. flash_header_v2_t *next_fhdr_v2;
  318. if (imximage_csf_size != 0) {
  319. fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
  320. exit(EXIT_FAILURE);
  321. }
  322. fhdr_v2->entry = imximage_iram_free_start +
  323. flash_offset + sizeof(flash_header_v2_t) +
  324. sizeof(boot_data_t);
  325. fhdr_v2->reserved1 = 0;
  326. fhdr_v2->reserved2 = 0;
  327. fhdr_v2->self = imximage_iram_free_start + flash_offset;
  328. fhdr_v2->dcd_ptr = 0;
  329. fhdr_v2->boot_data_ptr = fhdr_v2->self +
  330. offsetof(imx_header_v2_t, boot_data);
  331. hdr_v2->boot_data.start = imximage_iram_free_start;
  332. /*
  333. * The actural size of plugin image is "imximage_plugin_size +
  334. * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
  335. * flash_offset space.The ROM code only need to copy this size
  336. * to run the plugin code. However, later when copy the whole
  337. * U-Boot image to DDR, the ROM code use memcpy to copy the
  338. * first part of the image, and use the storage read function
  339. * to get the remaining part. This requires the dividing point
  340. * must be multiple of storage sector size. Here we set the
  341. * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
  342. * purpose.
  343. */
  344. hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
  345. /* Security feature are not supported */
  346. fhdr_v2->csf = 0;
  347. next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
  348. imximage_plugin_size);
  349. next_fhdr_v2 = &next_hdr_v2->fhdr;
  350. next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
  351. next_fhdr_v2->header.length =
  352. cpu_to_be16(sizeof(flash_header_v2_t));
  353. next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
  354. next_fhdr_v2->entry = entry_point;
  355. hdr_base = entry_point - sizeof(struct imx_header);
  356. next_fhdr_v2->reserved1 = 0;
  357. next_fhdr_v2->reserved2 = 0;
  358. next_fhdr_v2->self = hdr_base + imximage_plugin_size;
  359. next_fhdr_v2->dcd_ptr = 0;
  360. next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
  361. offsetof(imx_header_v2_t, boot_data);
  362. next_hdr_v2->boot_data.start = hdr_base - flash_offset;
  363. header_size_ptr = &next_hdr_v2->boot_data.size;
  364. next_hdr_v2->boot_data.plugin = 0;
  365. next_fhdr_v2->csf = 0;
  366. }
  367. }
  368. static void set_hdr_func(void)
  369. {
  370. switch (imximage_version) {
  371. case IMXIMAGE_V1:
  372. set_dcd_val = set_dcd_val_v1;
  373. set_dcd_param = NULL;
  374. set_dcd_rst = set_dcd_rst_v1;
  375. set_imx_hdr = set_imx_hdr_v1;
  376. max_dcd_entries = MAX_HW_CFG_SIZE_V1;
  377. break;
  378. case IMXIMAGE_V2:
  379. gd_last_cmd = NULL;
  380. set_dcd_val = set_dcd_val_v2;
  381. set_dcd_param = set_dcd_param_v2;
  382. set_dcd_rst = set_dcd_rst_v2;
  383. set_imx_hdr = set_imx_hdr_v2;
  384. max_dcd_entries = MAX_HW_CFG_SIZE_V2;
  385. break;
  386. default:
  387. err_imximage_version(imximage_version);
  388. break;
  389. }
  390. }
  391. static void print_hdr_v1(struct imx_header *imx_hdr)
  392. {
  393. imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
  394. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  395. dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
  396. uint32_t size, length, ver;
  397. size = dcd_v1->preamble.length;
  398. if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
  399. fprintf(stderr,
  400. "Error: Image corrupt DCD size %d exceed maximum %d\n",
  401. (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
  402. MAX_HW_CFG_SIZE_V1);
  403. exit(EXIT_FAILURE);
  404. }
  405. length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
  406. ver = detect_imximage_version(imx_hdr);
  407. printf("Image Type: Freescale IMX Boot Image\n");
  408. printf("Image Ver: %x", ver);
  409. printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
  410. printf("Data Size: ");
  411. genimg_print_size(dcd_v1->addr_data[length].type);
  412. printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
  413. printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
  414. }
  415. static void print_hdr_v2(struct imx_header *imx_hdr)
  416. {
  417. imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
  418. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  419. dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
  420. uint32_t size, version, plugin;
  421. plugin = hdr_v2->boot_data.plugin;
  422. if (!plugin) {
  423. size = be16_to_cpu(dcd_v2->header.length);
  424. if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
  425. fprintf(stderr,
  426. "Error: Image corrupt DCD size %d exceed maximum %d\n",
  427. (uint32_t)(size / sizeof(dcd_addr_data_t)),
  428. MAX_HW_CFG_SIZE_V2);
  429. exit(EXIT_FAILURE);
  430. }
  431. }
  432. version = detect_imximage_version(imx_hdr);
  433. printf("Image Type: Freescale IMX Boot Image\n");
  434. printf("Image Ver: %x", version);
  435. printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
  436. printf("Mode: %s\n", plugin ? "PLUGIN" : "DCD");
  437. if (!plugin) {
  438. printf("Data Size: ");
  439. genimg_print_size(hdr_v2->boot_data.size);
  440. printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
  441. printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
  442. if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
  443. (imximage_csf_size != UNDEFINED)) {
  444. uint16_t dcdlen;
  445. int offs;
  446. dcdlen = hdr_v2->data.dcd_table.header.length;
  447. offs = (char *)&hdr_v2->data.dcd_table
  448. - (char *)hdr_v2;
  449. printf("HAB Blocks: %08x %08x %08x\n",
  450. (uint32_t)fhdr_v2->self, 0,
  451. hdr_v2->boot_data.size - imximage_ivt_offset -
  452. imximage_csf_size);
  453. printf("DCD Blocks: 00910000 %08x %08x\n",
  454. offs, be16_to_cpu(dcdlen));
  455. }
  456. } else {
  457. imx_header_v2_t *next_hdr_v2;
  458. flash_header_v2_t *next_fhdr_v2;
  459. /*First Header*/
  460. printf("Plugin Data Size: ");
  461. genimg_print_size(hdr_v2->boot_data.size);
  462. printf("Plugin Code Size: ");
  463. genimg_print_size(imximage_plugin_size);
  464. printf("Plugin Load Address: %08x\n", hdr_v2->boot_data.start);
  465. printf("Plugin Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
  466. /*Second Header*/
  467. next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
  468. imximage_plugin_size);
  469. next_fhdr_v2 = &next_hdr_v2->fhdr;
  470. printf("U-Boot Data Size: ");
  471. genimg_print_size(next_hdr_v2->boot_data.size);
  472. printf("U-Boot Load Address: %08x\n",
  473. next_hdr_v2->boot_data.start);
  474. printf("U-Boot Entry Point: %08x\n",
  475. (uint32_t)next_fhdr_v2->entry);
  476. }
  477. }
  478. static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
  479. {
  480. int ifd;
  481. struct stat sbuf;
  482. char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
  483. char *ptr;
  484. ifd = open(plugin_file, O_RDONLY|O_BINARY);
  485. if (ifd < 0) {
  486. fprintf(stderr, "Can't open %s: %s\n",
  487. plugin_file,
  488. strerror(errno));
  489. exit(EXIT_FAILURE);
  490. }
  491. if (fstat(ifd, &sbuf) < 0) {
  492. fprintf(stderr, "Can't stat %s: %s\n",
  493. plugin_file,
  494. strerror(errno));
  495. exit(EXIT_FAILURE);
  496. }
  497. ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
  498. if (ptr == MAP_FAILED) {
  499. fprintf(stderr, "Can't read %s: %s\n",
  500. plugin_file,
  501. strerror(errno));
  502. exit(EXIT_FAILURE);
  503. }
  504. if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
  505. printf("plugin binary size too large\n");
  506. exit(EXIT_FAILURE);
  507. }
  508. memcpy(plugin_buf, ptr, sbuf.st_size);
  509. imximage_plugin_size = sbuf.st_size;
  510. (void) munmap((void *)ptr, sbuf.st_size);
  511. (void) close(ifd);
  512. imxhdr->header.hdr_v2.boot_data.plugin = 1;
  513. }
  514. static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
  515. char *name, int lineno, int fld, int dcd_len)
  516. {
  517. int value;
  518. static int cmd_ver_first = ~0;
  519. switch (cmd) {
  520. case CMD_IMAGE_VERSION:
  521. imximage_version = get_cfg_value(token, name, lineno);
  522. if (cmd_ver_first == 0) {
  523. fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
  524. "command need be the first before other "
  525. "valid command in the file\n", name, lineno);
  526. exit(EXIT_FAILURE);
  527. }
  528. cmd_ver_first = 1;
  529. set_hdr_func();
  530. break;
  531. case CMD_BOOT_FROM:
  532. imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
  533. "imximage boot option", token);
  534. if (imximage_ivt_offset == -1) {
  535. fprintf(stderr, "Error: %s[%d] -Invalid boot device"
  536. "(%s)\n", name, lineno, token);
  537. exit(EXIT_FAILURE);
  538. }
  539. imximage_init_loadsize =
  540. get_table_entry_id(imximage_boot_loadsize,
  541. "imximage boot option", token);
  542. if (imximage_init_loadsize == -1) {
  543. fprintf(stderr,
  544. "Error: %s[%d] -Invalid boot device(%s)\n",
  545. name, lineno, token);
  546. exit(EXIT_FAILURE);
  547. }
  548. /*
  549. * The SOC loads from the storage starting at address 0
  550. * then ensures that the load size contains the offset
  551. */
  552. if (imximage_init_loadsize < imximage_ivt_offset)
  553. imximage_init_loadsize = imximage_ivt_offset;
  554. if (unlikely(cmd_ver_first != 1))
  555. cmd_ver_first = 0;
  556. break;
  557. case CMD_BOOT_OFFSET:
  558. imximage_ivt_offset = get_cfg_value(token, name, lineno);
  559. if (unlikely(cmd_ver_first != 1))
  560. cmd_ver_first = 0;
  561. break;
  562. case CMD_WRITE_DATA:
  563. case CMD_WRITE_CLR_BIT:
  564. case CMD_WRITE_SET_BIT:
  565. case CMD_CHECK_BITS_SET:
  566. case CMD_CHECK_BITS_CLR:
  567. value = get_cfg_value(token, name, lineno);
  568. if (set_dcd_param)
  569. (*set_dcd_param)(imxhdr, dcd_len, cmd);
  570. (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
  571. if (unlikely(cmd_ver_first != 1))
  572. cmd_ver_first = 0;
  573. break;
  574. case CMD_CSF:
  575. if (imximage_version != 2) {
  576. fprintf(stderr,
  577. "Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
  578. name, lineno, token);
  579. exit(EXIT_FAILURE);
  580. }
  581. imximage_csf_size = get_cfg_value(token, name, lineno);
  582. if (unlikely(cmd_ver_first != 1))
  583. cmd_ver_first = 0;
  584. break;
  585. case CMD_PLUGIN:
  586. plugin_image = 1;
  587. copy_plugin_code(imxhdr, token);
  588. break;
  589. }
  590. }
  591. static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
  592. char *token, char *name, int lineno, int fld, int *dcd_len)
  593. {
  594. int value;
  595. switch (fld) {
  596. case CFG_COMMAND:
  597. *cmd = get_table_entry_id(imximage_cmds,
  598. "imximage commands", token);
  599. if (*cmd < 0) {
  600. fprintf(stderr, "Error: %s[%d] - Invalid command"
  601. "(%s)\n", name, lineno, token);
  602. exit(EXIT_FAILURE);
  603. }
  604. break;
  605. case CFG_REG_SIZE:
  606. parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
  607. break;
  608. case CFG_REG_ADDRESS:
  609. case CFG_REG_VALUE:
  610. switch(*cmd) {
  611. case CMD_WRITE_DATA:
  612. case CMD_WRITE_CLR_BIT:
  613. case CMD_WRITE_SET_BIT:
  614. case CMD_CHECK_BITS_SET:
  615. case CMD_CHECK_BITS_CLR:
  616. value = get_cfg_value(token, name, lineno);
  617. if (set_dcd_param)
  618. (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
  619. (*set_dcd_val)(imxhdr, name, lineno, fld, value,
  620. *dcd_len);
  621. if (fld == CFG_REG_VALUE) {
  622. (*dcd_len)++;
  623. if (*dcd_len > max_dcd_entries) {
  624. fprintf(stderr, "Error: %s[%d] -"
  625. "DCD table exceeds maximum size(%d)\n",
  626. name, lineno, max_dcd_entries);
  627. exit(EXIT_FAILURE);
  628. }
  629. }
  630. break;
  631. case CMD_PLUGIN:
  632. value = get_cfg_value(token, name, lineno);
  633. imximage_iram_free_start = value;
  634. break;
  635. default:
  636. break;
  637. }
  638. break;
  639. default:
  640. break;
  641. }
  642. }
  643. static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
  644. {
  645. FILE *fd = NULL;
  646. char *line = NULL;
  647. char *token, *saveptr1, *saveptr2;
  648. int lineno = 0;
  649. int fld;
  650. size_t len;
  651. int dcd_len = 0;
  652. int32_t cmd;
  653. fd = fopen(name, "r");
  654. if (fd == 0) {
  655. fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
  656. exit(EXIT_FAILURE);
  657. }
  658. /*
  659. * Very simple parsing, line starting with # are comments
  660. * and are dropped
  661. */
  662. while ((getline(&line, &len, fd)) > 0) {
  663. lineno++;
  664. token = strtok_r(line, "\r\n", &saveptr1);
  665. if (token == NULL)
  666. continue;
  667. /* Check inside the single line */
  668. for (fld = CFG_COMMAND, cmd = CMD_INVALID,
  669. line = token; ; line = NULL, fld++) {
  670. token = strtok_r(line, " \t", &saveptr2);
  671. if (token == NULL)
  672. break;
  673. /* Drop all text starting with '#' as comments */
  674. if (token[0] == '#')
  675. break;
  676. parse_cfg_fld(imxhdr, &cmd, token, name,
  677. lineno, fld, &dcd_len);
  678. }
  679. }
  680. (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
  681. fclose(fd);
  682. /* Exit if there is no BOOT_FROM field specifying the flash_offset */
  683. if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
  684. fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
  685. exit(EXIT_FAILURE);
  686. }
  687. return dcd_len;
  688. }
  689. static int imximage_check_image_types(uint8_t type)
  690. {
  691. if (type == IH_TYPE_IMXIMAGE)
  692. return EXIT_SUCCESS;
  693. else
  694. return EXIT_FAILURE;
  695. }
  696. static int imximage_verify_header(unsigned char *ptr, int image_size,
  697. struct image_tool_params *params)
  698. {
  699. struct imx_header *imx_hdr = (struct imx_header *) ptr;
  700. if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
  701. return -FDT_ERR_BADSTRUCTURE;
  702. return 0;
  703. }
  704. static void imximage_print_header(const void *ptr)
  705. {
  706. struct imx_header *imx_hdr = (struct imx_header *) ptr;
  707. uint32_t version = detect_imximage_version(imx_hdr);
  708. switch (version) {
  709. case IMXIMAGE_V1:
  710. print_hdr_v1(imx_hdr);
  711. break;
  712. case IMXIMAGE_V2:
  713. print_hdr_v2(imx_hdr);
  714. break;
  715. default:
  716. err_imximage_version(version);
  717. break;
  718. }
  719. }
  720. static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
  721. struct image_tool_params *params)
  722. {
  723. struct imx_header *imxhdr = (struct imx_header *)ptr;
  724. uint32_t dcd_len;
  725. uint32_t header_size;
  726. /*
  727. * In order to not change the old imx cfg file
  728. * by adding VERSION command into it, here need
  729. * set up function ptr group to V1 by default.
  730. */
  731. imximage_version = IMXIMAGE_V1;
  732. /* Be able to detect if the cfg file has no BOOT_FROM tag */
  733. imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
  734. imximage_csf_size = 0;
  735. set_hdr_func();
  736. /* Parse dcd configuration file */
  737. dcd_len = parse_cfg_file(imxhdr, params->imagename);
  738. if (imximage_version == IMXIMAGE_V1)
  739. header_size = sizeof(flash_header_v1_t);
  740. else {
  741. header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
  742. if (!plugin_image)
  743. header_size += sizeof(dcd_v2_t);
  744. else
  745. header_size += MAX_PLUGIN_CODE_SIZE;
  746. }
  747. if (imximage_init_loadsize < imximage_ivt_offset + header_size)
  748. imximage_init_loadsize = imximage_ivt_offset + header_size;
  749. /* Set the imx header */
  750. (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
  751. /*
  752. * ROM bug alert
  753. *
  754. * MX53 only loads 512 byte multiples in case of SD boot.
  755. * MX53 only loads NAND page multiples in case of NAND boot and
  756. * supports up to 4096 byte large pages, thus align to 4096.
  757. *
  758. * The remaining fraction of a block bytes would not be loaded!
  759. */
  760. *header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
  761. if (csf_ptr && imximage_csf_size) {
  762. *csf_ptr = params->ep - imximage_init_loadsize +
  763. *header_size_ptr;
  764. *header_size_ptr += imximage_csf_size;
  765. }
  766. }
  767. int imximage_check_params(struct image_tool_params *params)
  768. {
  769. if (!params)
  770. return CFG_INVALID;
  771. if (!strlen(params->imagename)) {
  772. fprintf(stderr, "Error: %s - Configuration file not specified, "
  773. "it is needed for imximage generation\n",
  774. params->cmdname);
  775. return CFG_INVALID;
  776. }
  777. /*
  778. * Check parameters:
  779. * XIP is not allowed and verify that incompatible
  780. * parameters are not sent at the same time
  781. * For example, if list is required a data image must not be provided
  782. */
  783. return (params->dflag && (params->fflag || params->lflag)) ||
  784. (params->fflag && (params->dflag || params->lflag)) ||
  785. (params->lflag && (params->dflag || params->fflag)) ||
  786. (params->xflag) || !(strlen(params->imagename));
  787. }
  788. static int imximage_generate(struct image_tool_params *params,
  789. struct image_type_params *tparams)
  790. {
  791. struct imx_header *imxhdr;
  792. size_t alloc_len;
  793. struct stat sbuf;
  794. char *datafile = params->datafile;
  795. uint32_t pad_len, header_size;
  796. memset(&imximage_header, 0, sizeof(imximage_header));
  797. /*
  798. * In order to not change the old imx cfg file
  799. * by adding VERSION command into it, here need
  800. * set up function ptr group to V1 by default.
  801. */
  802. imximage_version = IMXIMAGE_V1;
  803. /* Be able to detect if the cfg file has no BOOT_FROM tag */
  804. imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
  805. imximage_csf_size = 0;
  806. set_hdr_func();
  807. /* Parse dcd configuration file */
  808. parse_cfg_file(&imximage_header, params->imagename);
  809. if (imximage_version == IMXIMAGE_V1)
  810. header_size = sizeof(imx_header_v1_t);
  811. else {
  812. header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
  813. if (!plugin_image)
  814. header_size += sizeof(dcd_v2_t);
  815. else
  816. header_size += MAX_PLUGIN_CODE_SIZE;
  817. }
  818. if (imximage_init_loadsize < imximage_ivt_offset + header_size)
  819. imximage_init_loadsize = imximage_ivt_offset + header_size;
  820. alloc_len = imximage_init_loadsize - imximage_ivt_offset;
  821. if (alloc_len < header_size) {
  822. fprintf(stderr, "%s: header error\n",
  823. params->cmdname);
  824. exit(EXIT_FAILURE);
  825. }
  826. imxhdr = malloc(alloc_len);
  827. if (!imxhdr) {
  828. fprintf(stderr, "%s: malloc return failure: %s\n",
  829. params->cmdname, strerror(errno));
  830. exit(EXIT_FAILURE);
  831. }
  832. memset(imxhdr, 0, alloc_len);
  833. tparams->header_size = alloc_len;
  834. tparams->hdr = imxhdr;
  835. /* determine data image file length */
  836. if (stat(datafile, &sbuf) < 0) {
  837. fprintf(stderr, "%s: Can't stat %s: %s\n",
  838. params->cmdname, datafile, strerror(errno));
  839. exit(EXIT_FAILURE);
  840. }
  841. pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
  842. return pad_len;
  843. }
  844. /*
  845. * imximage parameters
  846. */
  847. U_BOOT_IMAGE_TYPE(
  848. imximage,
  849. "Freescale i.MX Boot Image support",
  850. 0,
  851. NULL,
  852. imximage_check_params,
  853. imximage_verify_header,
  854. imximage_print_header,
  855. imximage_set_header,
  856. NULL,
  857. imximage_check_image_types,
  858. NULL,
  859. imximage_generate
  860. );