Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. /*
  2. * ifdtool - Manage Intel Firmware Descriptor information
  3. *
  4. * Copyright (C) 2011 The ChromiumOS Authors.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0
  7. *
  8. * From Coreboot project
  9. */
  10. #include <stdint.h>
  11. #define __packed __attribute__((packed))
  12. #define IFDTOOL_VERSION "1.1-U-Boot"
  13. #define WRITE_MAX 16
  14. enum spi_frequency {
  15. SPI_FREQUENCY_20MHZ = 0,
  16. SPI_FREQUENCY_33MHZ = 1,
  17. SPI_FREQUENCY_50MHZ = 4,
  18. };
  19. enum component_density {
  20. COMPONENT_DENSITY_512KB = 0,
  21. COMPONENT_DENSITY_1MB = 1,
  22. COMPONENT_DENSITY_2MB = 2,
  23. COMPONENT_DENSITY_4MB = 3,
  24. COMPONENT_DENSITY_8MB = 4,
  25. COMPONENT_DENSITY_16MB = 5,
  26. };
  27. /* flash descriptor */
  28. struct __packed fdbar_t {
  29. uint32_t flvalsig;
  30. uint32_t flmap0;
  31. uint32_t flmap1;
  32. uint32_t flmap2;
  33. uint8_t reserved[0xefc - 0x20];
  34. uint32_t flumap1;
  35. };
  36. #define MAX_REGIONS 5
  37. /* regions */
  38. struct __packed frba_t {
  39. uint32_t flreg[MAX_REGIONS];
  40. };
  41. /* component section */
  42. struct __packed fcba_t {
  43. uint32_t flcomp;
  44. uint32_t flill;
  45. uint32_t flpb;
  46. };
  47. #define MAX_STRAPS 18
  48. /* pch strap */
  49. struct __packed fpsba_t {
  50. uint32_t pchstrp[MAX_STRAPS];
  51. };
  52. /* master */
  53. struct __packed fmba_t {
  54. uint32_t flmstr1;
  55. uint32_t flmstr2;
  56. uint32_t flmstr3;
  57. };
  58. /* processor strap */
  59. struct __packed fmsba_t {
  60. uint32_t data[8];
  61. };
  62. /* ME VSCC */
  63. struct vscc_t {
  64. uint32_t jid;
  65. uint32_t vscc;
  66. };
  67. struct vtba_t {
  68. /* Actual number of entries specified in vtl */
  69. struct vscc_t entry[8];
  70. };
  71. struct region_t {
  72. int base, limit, size;
  73. };