Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. # Modified for U-Boot
  5. prefix := tpl
  6. src := $(patsubst $(prefix)/%,%,$(obj))
  7. ifeq ($(obj),$(src))
  8. prefix := spl
  9. src := $(patsubst $(prefix)/%,%,$(obj))
  10. ifeq ($(obj),$(src))
  11. prefix := .
  12. endif
  13. endif
  14. PHONY := __build
  15. __build:
  16. # Init all relevant variables used in kbuild files so
  17. # 1) they have correct type
  18. # 2) they do not inherit any value from the environment
  19. obj-y :=
  20. obj-m :=
  21. lib-y :=
  22. lib-m :=
  23. always :=
  24. targets :=
  25. subdir-y :=
  26. subdir-m :=
  27. EXTRA_AFLAGS :=
  28. EXTRA_CFLAGS :=
  29. EXTRA_CPPFLAGS :=
  30. EXTRA_LDFLAGS :=
  31. asflags-y :=
  32. ccflags-y :=
  33. cppflags-y :=
  34. ldflags-y :=
  35. subdir-asflags-y :=
  36. subdir-ccflags-y :=
  37. # Read auto.conf if it exists, otherwise ignore
  38. # Modified for U-Boot
  39. -include include/config/auto.conf
  40. -include $(prefix)/include/autoconf.mk
  41. include scripts/Makefile.uncmd_spl
  42. include scripts/Kbuild.include
  43. # For backward compatibility check that these variables do not change
  44. save-cflags := $(CFLAGS)
  45. # The filename Kbuild has precedence over Makefile
  46. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  47. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  48. include $(kbuild-file)
  49. # Added for U-Boot
  50. asflags-y += $(PLATFORM_CPPFLAGS)
  51. ccflags-y += $(PLATFORM_CPPFLAGS)
  52. cppflags-y += $(PLATFORM_CPPFLAGS)
  53. # If the save-* variables changed error out
  54. ifeq ($(KBUILD_NOPEDANTIC),)
  55. ifneq ("$(save-cflags)","$(CFLAGS)")
  56. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  57. endif
  58. endif
  59. include scripts/Makefile.lib
  60. ifdef host-progs
  61. ifneq ($(hostprogs-y),$(host-progs))
  62. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  63. hostprogs-y += $(host-progs)
  64. endif
  65. endif
  66. # Do not include host rules unless needed
  67. ifneq ($(hostprogs-y)$(hostprogs-m),)
  68. include scripts/Makefile.host
  69. endif
  70. # Uncommented for U-Boot
  71. # We need to create output dicrectory for SPL and TPL even for in-tree build
  72. #ifneq ($(KBUILD_SRC),)
  73. # Create output directory if not already present
  74. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  75. # Create directories for object files if directory does not exist
  76. # Needed when obj-y := dir/file.o syntax is used
  77. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  78. #endif
  79. ifndef obj
  80. $(warning kbuild: Makefile.build is included improperly)
  81. endif
  82. # ===========================================================================
  83. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  84. lib-target := $(obj)/lib.a
  85. endif
  86. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  87. builtin-target := $(obj)/built-in.o
  88. endif
  89. modorder-target := $(obj)/modules.order
  90. # We keep a list of all modules in $(MODVERDIR)
  91. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  92. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  93. $(subdir-ym) $(always)
  94. @:
  95. # Linus' kernel sanity checking tool
  96. ifneq ($(KBUILD_CHECKSRC),0)
  97. ifeq ($(KBUILD_CHECKSRC),2)
  98. quiet_cmd_force_checksrc = CHECK $<
  99. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  100. else
  101. quiet_cmd_checksrc = CHECK $<
  102. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  103. endif
  104. endif
  105. # Do section mismatch analysis for each module/built-in.o
  106. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  107. cmd_secanalysis = ; scripts/mod/modpost $@
  108. endif
  109. # Compile C sources (.c)
  110. # ---------------------------------------------------------------------------
  111. # Default is built-in, unless we know otherwise
  112. modkern_cflags = \
  113. $(if $(part-of-module), \
  114. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  115. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  116. quiet_modtag := $(empty) $(empty)
  117. $(real-objs-m) : part-of-module := y
  118. $(real-objs-m:.o=.i) : part-of-module := y
  119. $(real-objs-m:.o=.s) : part-of-module := y
  120. $(real-objs-m:.o=.lst): part-of-module := y
  121. $(real-objs-m) : quiet_modtag := [M]
  122. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  123. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  124. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  125. $(obj-m) : quiet_modtag := [M]
  126. # Default for not multi-part modules
  127. modname = $(basetarget)
  128. $(multi-objs-m) : modname = $(modname-multi)
  129. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  130. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  131. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  132. $(multi-objs-y) : modname = $(modname-multi)
  133. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  134. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  135. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  136. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  137. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  138. $(obj)/%.s: $(src)/%.c FORCE
  139. $(call if_changed_dep,cc_s_c)
  140. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  141. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  142. $(obj)/%.i: $(src)/%.c FORCE
  143. $(call if_changed_dep,cc_i_c)
  144. cmd_gensymtypes = \
  145. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  146. $(GENKSYMS) $(if $(1), -T $(2)) \
  147. $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
  148. $(if $(KBUILD_PRESERVE),-p) \
  149. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  150. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  151. cmd_cc_symtypes_c = \
  152. set -e; \
  153. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  154. test -s $@ || rm -f $@
  155. $(obj)/%.symtypes : $(src)/%.c FORCE
  156. $(call cmd,cc_symtypes_c)
  157. # C (.c) files
  158. # The C file is compiled and updated dependency information is generated.
  159. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  160. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  161. ifndef CONFIG_MODVERSIONS
  162. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  163. else
  164. # When module versioning is enabled the following steps are executed:
  165. # o compile a .tmp_<file>.o from <file>.c
  166. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  167. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  168. # are done.
  169. # o otherwise, we calculate symbol versions using the good old
  170. # genksyms on the preprocessed source and postprocess them in a way
  171. # that they are usable as a linker script
  172. # o generate <file>.o from .tmp_<file>.o using the linker to
  173. # replace the unresolved symbols __crc_exported_symbol with
  174. # the actual value of the checksum generated by genksyms
  175. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  176. cmd_modversions = \
  177. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  178. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  179. > $(@D)/.tmp_$(@F:.o=.ver); \
  180. \
  181. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  182. -T $(@D)/.tmp_$(@F:.o=.ver); \
  183. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  184. else \
  185. mv -f $(@D)/.tmp_$(@F) $@; \
  186. fi;
  187. endif
  188. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  189. ifdef BUILD_C_RECORDMCOUNT
  190. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  191. RECORDMCOUNT_FLAGS = -w
  192. endif
  193. # Due to recursion, we must skip empty.o.
  194. # The empty.o file is created in the make process in order to determine
  195. # the target endianness and word size. It is made before all other C
  196. # files, including recordmcount.
  197. sub_cmd_record_mcount = \
  198. if [ $(@) != "scripts/mod/empty.o" ]; then \
  199. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  200. fi;
  201. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  202. $(srctree)/scripts/recordmcount.h
  203. else
  204. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  205. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  206. "$(if $(CONFIG_64BIT),64,32)" \
  207. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  208. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  209. "$(if $(part-of-module),1,0)" "$(@)";
  210. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  211. endif
  212. cmd_record_mcount = \
  213. if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
  214. $(sub_cmd_record_mcount) \
  215. fi;
  216. endif
  217. define rule_cc_o_c
  218. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  219. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  220. $(cmd_modversions) \
  221. $(call echo-cmd,record_mcount) \
  222. $(cmd_record_mcount) \
  223. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  224. $(dot-target).tmp; \
  225. rm -f $(depfile); \
  226. mv -f $(dot-target).tmp $(dot-target).cmd
  227. endef
  228. # Built-in and composite module parts
  229. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  230. $(call cmd,force_checksrc)
  231. $(call if_changed_rule,cc_o_c)
  232. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  233. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  234. $(call cmd,force_checksrc)
  235. $(call if_changed_rule,cc_o_c)
  236. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  237. quiet_cmd_cc_lst_c = MKLST $@
  238. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  239. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  240. System.map $(OBJDUMP) > $@
  241. $(obj)/%.lst: $(src)/%.c FORCE
  242. $(call if_changed_dep,cc_lst_c)
  243. # Compile assembler sources (.S)
  244. # ---------------------------------------------------------------------------
  245. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  246. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  247. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  248. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  249. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  250. $(obj)/%.s: $(src)/%.S FORCE
  251. $(call if_changed_dep,as_s_S)
  252. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  253. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  254. $(obj)/%.o: $(src)/%.S FORCE
  255. $(call if_changed_dep,as_o_S)
  256. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  257. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  258. # Linker scripts preprocessor (.lds.S -> .lds)
  259. # ---------------------------------------------------------------------------
  260. quiet_cmd_cpp_lds_S = LDS $@
  261. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  262. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  263. $(obj)/%.lds: $(src)/%.lds.S FORCE
  264. $(call if_changed_dep,cpp_lds_S)
  265. # ASN.1 grammar
  266. # ---------------------------------------------------------------------------
  267. quiet_cmd_asn1_compiler = ASN.1 $@
  268. cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
  269. $(subst .h,.c,$@) $(subst .c,.h,$@)
  270. .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
  271. $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
  272. $(call cmd,asn1_compiler)
  273. # Build the compiled-in targets
  274. # ---------------------------------------------------------------------------
  275. # To build objects in subdirs, we need to descend into the directories
  276. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  277. #
  278. # Rule to compile a set of .o files into one .o file
  279. #
  280. ifdef builtin-target
  281. quiet_cmd_link_o_target = LD $@
  282. # If the list of objects to link is empty, just create an empty built-in.o
  283. cmd_link_o_target = $(if $(strip $(obj-y)),\
  284. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  285. $(cmd_secanalysis),\
  286. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  287. $(builtin-target): $(obj-y) FORCE
  288. $(call if_changed,link_o_target)
  289. targets += $(builtin-target)
  290. endif # builtin-target
  291. #
  292. # Rule to create modules.order file
  293. #
  294. # Create commands to either record .ko file or cat modules.order from
  295. # a subdirectory
  296. modorder-cmds = \
  297. $(foreach m, $(modorder), \
  298. $(if $(filter %/modules.order, $m), \
  299. cat $m;, echo kernel/$m;))
  300. $(modorder-target): $(subdir-ym) FORCE
  301. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  302. #
  303. # Rule to compile a set of .o files into one .a file
  304. #
  305. ifdef lib-target
  306. quiet_cmd_link_l_target = AR $@
  307. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  308. $(lib-target): $(lib-y) FORCE
  309. $(call if_changed,link_l_target)
  310. targets += $(lib-target)
  311. endif
  312. #
  313. # Rule to link composite objects
  314. #
  315. # Composite objects are specified in kbuild makefile as follows:
  316. # <composite-object>-objs := <list of .o files>
  317. # or
  318. # <composite-object>-y := <list of .o files>
  319. link_multi_deps = \
  320. $(filter $(addprefix $(obj)/, \
  321. $($(subst $(obj)/,,$(@:.o=-objs))) \
  322. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  323. quiet_cmd_link_multi-y = LD $@
  324. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  325. quiet_cmd_link_multi-m = LD [M] $@
  326. cmd_link_multi-m = $(cmd_link_multi-y)
  327. $(multi-used-y): FORCE
  328. $(call if_changed,link_multi-y)
  329. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  330. $(multi-used-m): FORCE
  331. $(call if_changed,link_multi-m)
  332. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  333. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  334. targets += $(multi-used-y) $(multi-used-m)
  335. # Descending
  336. # ---------------------------------------------------------------------------
  337. PHONY += $(subdir-ym)
  338. $(subdir-ym):
  339. $(Q)$(MAKE) $(build)=$@
  340. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  341. # ---------------------------------------------------------------------------
  342. PHONY += FORCE
  343. FORCE:
  344. # Read all saved command lines and dependencies for the $(targets) we
  345. # may be building above, using $(if_changed{,_dep}). As an
  346. # optimization, we don't need to read them if the target does not
  347. # exist, we will rebuild anyway in that case.
  348. targets := $(wildcard $(sort $(targets)))
  349. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  350. ifneq ($(cmd_files),)
  351. include $(cmd_files)
  352. endif
  353. # Declare the contents of the .PHONY variable as phony. We keep that
  354. # information in a variable se we can use it in if_changed and friends.
  355. .PHONY: $(PHONY)