Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  4. */
  5. #include <asm-offsets.h>
  6. #include <config.h>
  7. #include <linux/linkage.h>
  8. #include <asm/arcregs.h>
  9. ENTRY(_start)
  10. /* Setup interrupt vector base that matches "__text_start" */
  11. sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
  12. ; Disable/enable I-cache according to configuration
  13. lr r5, [ARC_BCR_IC_BUILD]
  14. breq r5, 0, 1f ; I$ doesn't exist
  15. lr r5, [ARC_AUX_IC_CTRL]
  16. #ifndef CONFIG_SYS_ICACHE_OFF
  17. bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
  18. #else
  19. bset r5, r5, 0 ; I$ exists, but is not used
  20. #endif
  21. sr r5, [ARC_AUX_IC_CTRL]
  22. mov r5, 1
  23. sr r5, [ARC_AUX_IC_IVIC]
  24. ; As per ARC HS databook (see chapter 5.3.3.2)
  25. ; it is required to add 3 NOPs after each write to IC_IVIC.
  26. nop
  27. nop
  28. nop
  29. 1:
  30. ; Disable/enable D-cache according to configuration
  31. lr r5, [ARC_BCR_DC_BUILD]
  32. breq r5, 0, 1f ; D$ doesn't exist
  33. lr r5, [ARC_AUX_DC_CTRL]
  34. bclr r5, r5, 6 ; Invalidate (discard w/o wback)
  35. #ifndef CONFIG_SYS_DCACHE_OFF
  36. bclr r5, r5, 0 ; Enable (+Inv)
  37. #else
  38. bset r5, r5, 0 ; Disable (+Inv)
  39. #endif
  40. sr r5, [ARC_AUX_DC_CTRL]
  41. mov r5, 1
  42. sr r5, [ARC_AUX_DC_IVDC]
  43. 1:
  44. #ifdef CONFIG_ISA_ARCV2
  45. ; Disable System-Level Cache (SLC)
  46. lr r5, [ARC_BCR_SLC]
  47. breq r5, 0, 1f ; SLC doesn't exist
  48. lr r5, [ARC_AUX_SLC_CTRL]
  49. bclr r5, r5, 6 ; Invalidate (discard w/o wback)
  50. bclr r5, r5, 0 ; Enable (+Inv)
  51. sr r5, [ARC_AUX_SLC_CTRL]
  52. 1:
  53. #endif
  54. /* Establish C runtime stack and frame */
  55. mov %sp, CONFIG_SYS_INIT_SP_ADDR
  56. mov %fp, %sp
  57. /* Allocate reserved area from current top of stack */
  58. mov %r0, %sp
  59. bl board_init_f_alloc_reserve
  60. /* Set stack below reserved area, adjust frame pointer accordingly */
  61. mov %sp, %r0
  62. mov %fp, %sp
  63. /* Initialize reserved area - note: r0 already contains address */
  64. bl board_init_f_init_reserve
  65. /* Zero the one and only argument of "board_init_f" */
  66. mov_s %r0, 0
  67. bl board_init_f
  68. /* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
  69. /* Make sure we don't lose GD overwritten by zero new GD */
  70. mov %r0, %r25
  71. mov %r1, 0
  72. bl board_init_r
  73. ENDPROC(_start)
  74. /*
  75. * void board_init_f_r_trampoline(stack-pointer address)
  76. *
  77. * This "function" does not return, instead it continues in RAM
  78. * after relocating the monitor code.
  79. *
  80. * r0 = new stack-pointer
  81. */
  82. ENTRY(board_init_f_r_trampoline)
  83. /* Set up the stack- and frame-pointers */
  84. mov %sp, %r0
  85. mov %fp, %sp
  86. /* Update position of intterupt vector table */
  87. lr %r0, [ARC_AUX_INTR_VEC_BASE]
  88. ld %r1, [%r25, GD_RELOC_OFF]
  89. add %r0, %r0, %r1
  90. sr %r0, [ARC_AUX_INTR_VEC_BASE]
  91. /* Re-enter U-Boot by calling board_init_f_r */
  92. j board_init_f_r
  93. ENDPROC(board_init_f_r_trampoline)