Fork of the vendor (Boundary Devices) u-boot for Reform 2, with minor tweaks. The goal is to migrate to mainstream u-boot or barebox ASAP. The main impediment so far is the 4GB RAM config.
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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := tpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := spl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := .
  13. endif
  14. endif
  15. PHONY := __build
  16. __build:
  17. # Init all relevant variables used in kbuild files so
  18. # 1) they have correct type
  19. # 2) they do not inherit any value from the environment
  20. obj-y :=
  21. obj-m :=
  22. lib-y :=
  23. lib-m :=
  24. always :=
  25. targets :=
  26. subdir-y :=
  27. subdir-m :=
  28. EXTRA_AFLAGS :=
  29. EXTRA_CFLAGS :=
  30. EXTRA_CPPFLAGS :=
  31. EXTRA_LDFLAGS :=
  32. asflags-y :=
  33. ccflags-y :=
  34. cppflags-y :=
  35. ldflags-y :=
  36. subdir-asflags-y :=
  37. subdir-ccflags-y :=
  38. # Read auto.conf if it exists, otherwise ignore
  39. # Modified for U-Boot
  40. -include include/config/auto.conf
  41. -include $(prefix)/include/autoconf.mk
  42. include scripts/Makefile.uncmd_spl
  43. include scripts/Kbuild.include
  44. # For backward compatibility check that these variables do not change
  45. save-cflags := $(CFLAGS)
  46. # The filename Kbuild has precedence over Makefile
  47. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  48. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  49. include $(kbuild-file)
  50. # Added for U-Boot
  51. asflags-y += $(PLATFORM_CPPFLAGS)
  52. ccflags-y += $(PLATFORM_CPPFLAGS)
  53. cppflags-y += $(PLATFORM_CPPFLAGS)
  54. # If the save-* variables changed error out
  55. ifeq ($(KBUILD_NOPEDANTIC),)
  56. ifneq ("$(save-cflags)","$(CFLAGS)")
  57. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  58. endif
  59. endif
  60. include scripts/Makefile.lib
  61. ifdef host-progs
  62. ifneq ($(hostprogs-y),$(host-progs))
  63. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  64. hostprogs-y += $(host-progs)
  65. endif
  66. endif
  67. # Do not include host rules unless needed
  68. ifneq ($(hostprogs-y)$(hostprogs-m),)
  69. include scripts/Makefile.host
  70. endif
  71. # Uncommented for U-Boot
  72. # We need to create output dicrectory for SPL and TPL even for in-tree build
  73. #ifneq ($(KBUILD_SRC),)
  74. # Create output directory if not already present
  75. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  76. # Create directories for object files if directory does not exist
  77. # Needed when obj-y := dir/file.o syntax is used
  78. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  79. #endif
  80. ifndef obj
  81. $(warning kbuild: Makefile.build is included improperly)
  82. endif
  83. # ===========================================================================
  84. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  85. lib-target := $(obj)/lib.a
  86. endif
  87. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  88. builtin-target := $(obj)/built-in.o
  89. endif
  90. modorder-target := $(obj)/modules.order
  91. # We keep a list of all modules in $(MODVERDIR)
  92. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  93. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  94. $(subdir-ym) $(always)
  95. @:
  96. # Linus' kernel sanity checking tool
  97. ifneq ($(KBUILD_CHECKSRC),0)
  98. ifeq ($(KBUILD_CHECKSRC),2)
  99. quiet_cmd_force_checksrc = CHECK $<
  100. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  101. else
  102. quiet_cmd_checksrc = CHECK $<
  103. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  104. endif
  105. endif
  106. # Do section mismatch analysis for each module/built-in.o
  107. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  108. cmd_secanalysis = ; scripts/mod/modpost $@
  109. endif
  110. # Compile C sources (.c)
  111. # ---------------------------------------------------------------------------
  112. # Default is built-in, unless we know otherwise
  113. modkern_cflags = \
  114. $(if $(part-of-module), \
  115. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  116. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  117. quiet_modtag := $(empty) $(empty)
  118. $(real-objs-m) : part-of-module := y
  119. $(real-objs-m:.o=.i) : part-of-module := y
  120. $(real-objs-m:.o=.s) : part-of-module := y
  121. $(real-objs-m:.o=.lst): part-of-module := y
  122. $(real-objs-m) : quiet_modtag := [M]
  123. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  124. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  125. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  126. $(obj-m) : quiet_modtag := [M]
  127. # Default for not multi-part modules
  128. modname = $(basetarget)
  129. $(multi-objs-m) : modname = $(modname-multi)
  130. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  131. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  132. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  133. $(multi-objs-y) : modname = $(modname-multi)
  134. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  135. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  136. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  137. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  138. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  139. $(obj)/%.s: $(src)/%.c FORCE
  140. $(call if_changed_dep,cc_s_c)
  141. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  142. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  143. $(obj)/%.i: $(src)/%.c FORCE
  144. $(call if_changed_dep,cc_i_c)
  145. cmd_gensymtypes = \
  146. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  147. $(GENKSYMS) $(if $(1), -T $(2)) \
  148. $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
  149. $(if $(KBUILD_PRESERVE),-p) \
  150. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  151. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  152. cmd_cc_symtypes_c = \
  153. set -e; \
  154. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  155. test -s $@ || rm -f $@
  156. $(obj)/%.symtypes : $(src)/%.c FORCE
  157. $(call cmd,cc_symtypes_c)
  158. # C (.c) files
  159. # The C file is compiled and updated dependency information is generated.
  160. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  161. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  162. ifndef CONFIG_MODVERSIONS
  163. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  164. else
  165. # When module versioning is enabled the following steps are executed:
  166. # o compile a .tmp_<file>.o from <file>.c
  167. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  168. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  169. # are done.
  170. # o otherwise, we calculate symbol versions using the good old
  171. # genksyms on the preprocessed source and postprocess them in a way
  172. # that they are usable as a linker script
  173. # o generate <file>.o from .tmp_<file>.o using the linker to
  174. # replace the unresolved symbols __crc_exported_symbol with
  175. # the actual value of the checksum generated by genksyms
  176. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  177. cmd_modversions = \
  178. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  179. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  180. > $(@D)/.tmp_$(@F:.o=.ver); \
  181. \
  182. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  183. -T $(@D)/.tmp_$(@F:.o=.ver); \
  184. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  185. else \
  186. mv -f $(@D)/.tmp_$(@F) $@; \
  187. fi;
  188. endif
  189. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  190. ifdef BUILD_C_RECORDMCOUNT
  191. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  192. RECORDMCOUNT_FLAGS = -w
  193. endif
  194. # Due to recursion, we must skip empty.o.
  195. # The empty.o file is created in the make process in order to determine
  196. # the target endianness and word size. It is made before all other C
  197. # files, including recordmcount.
  198. sub_cmd_record_mcount = \
  199. if [ $(@) != "scripts/mod/empty.o" ]; then \
  200. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  201. fi;
  202. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  203. $(srctree)/scripts/recordmcount.h
  204. else
  205. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  206. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  207. "$(if $(CONFIG_64BIT),64,32)" \
  208. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  209. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  210. "$(if $(part-of-module),1,0)" "$(@)";
  211. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  212. endif
  213. cmd_record_mcount = \
  214. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  215. "$(CC_FLAGS_FTRACE)" ]; then \
  216. $(sub_cmd_record_mcount) \
  217. fi;
  218. endif
  219. define rule_cc_o_c
  220. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  221. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  222. $(cmd_modversions) \
  223. $(call echo-cmd,record_mcount) \
  224. $(cmd_record_mcount) \
  225. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  226. $(dot-target).tmp; \
  227. rm -f $(depfile); \
  228. mv -f $(dot-target).tmp $(dot-target).cmd
  229. endef
  230. # Built-in and composite module parts
  231. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  232. $(call cmd,force_checksrc)
  233. $(call if_changed_rule,cc_o_c)
  234. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  235. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  236. $(call cmd,force_checksrc)
  237. $(call if_changed_rule,cc_o_c)
  238. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  239. quiet_cmd_cc_lst_c = MKLST $@
  240. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  241. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  242. System.map $(OBJDUMP) > $@
  243. $(obj)/%.lst: $(src)/%.c FORCE
  244. $(call if_changed_dep,cc_lst_c)
  245. # Compile assembler sources (.S)
  246. # ---------------------------------------------------------------------------
  247. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  248. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  249. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  250. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  251. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  252. $(obj)/%.s: $(src)/%.S FORCE
  253. $(call if_changed_dep,as_s_S)
  254. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  255. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  256. $(obj)/%.o: $(src)/%.S FORCE
  257. $(call if_changed_dep,as_o_S)
  258. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  259. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  260. # Linker scripts preprocessor (.lds.S -> .lds)
  261. # ---------------------------------------------------------------------------
  262. quiet_cmd_cpp_lds_S = LDS $@
  263. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  264. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  265. $(obj)/%.lds: $(src)/%.lds.S FORCE
  266. $(call if_changed_dep,cpp_lds_S)
  267. # ASN.1 grammar
  268. # ---------------------------------------------------------------------------
  269. quiet_cmd_asn1_compiler = ASN.1 $@
  270. cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
  271. $(subst .h,.c,$@) $(subst .c,.h,$@)
  272. .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
  273. $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
  274. $(call cmd,asn1_compiler)
  275. # Build the compiled-in targets
  276. # ---------------------------------------------------------------------------
  277. # To build objects in subdirs, we need to descend into the directories
  278. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  279. #
  280. # Rule to compile a set of .o files into one .o file
  281. #
  282. ifdef builtin-target
  283. quiet_cmd_link_o_target = LD $@
  284. # If the list of objects to link is empty, just create an empty built-in.o
  285. cmd_link_o_target = $(if $(strip $(obj-y)),\
  286. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  287. $(cmd_secanalysis),\
  288. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  289. $(builtin-target): $(obj-y) FORCE
  290. $(call if_changed,link_o_target)
  291. targets += $(builtin-target)
  292. endif # builtin-target
  293. #
  294. # Rule to create modules.order file
  295. #
  296. # Create commands to either record .ko file or cat modules.order from
  297. # a subdirectory
  298. modorder-cmds = \
  299. $(foreach m, $(modorder), \
  300. $(if $(filter %/modules.order, $m), \
  301. cat $m;, echo kernel/$m;))
  302. $(modorder-target): $(subdir-ym) FORCE
  303. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  304. #
  305. # Rule to compile a set of .o files into one .a file
  306. #
  307. ifdef lib-target
  308. quiet_cmd_link_l_target = AR $@
  309. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  310. $(lib-target): $(lib-y) FORCE
  311. $(call if_changed,link_l_target)
  312. targets += $(lib-target)
  313. endif
  314. #
  315. # Rule to link composite objects
  316. #
  317. # Composite objects are specified in kbuild makefile as follows:
  318. # <composite-object>-objs := <list of .o files>
  319. # or
  320. # <composite-object>-y := <list of .o files>
  321. link_multi_deps = \
  322. $(filter $(addprefix $(obj)/, \
  323. $($(subst $(obj)/,,$(@:.o=-objs))) \
  324. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  325. quiet_cmd_link_multi-y = LD $@
  326. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  327. quiet_cmd_link_multi-m = LD [M] $@
  328. cmd_link_multi-m = $(cmd_link_multi-y)
  329. $(multi-used-y): FORCE
  330. $(call if_changed,link_multi-y)
  331. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  332. $(multi-used-m): FORCE
  333. $(call if_changed,link_multi-m)
  334. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  335. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  336. targets += $(multi-used-y) $(multi-used-m)
  337. # Add intermediate targets:
  338. # When building objects with specific suffix patterns, add intermediate
  339. # targets that the final targets are derived from.
  340. intermediate_targets = $(foreach sfx, $(2), \
  341. $(patsubst %$(strip $(1)),%$(sfx), \
  342. $(filter %$(strip $(1)), $(targets))))
  343. # %.lex.o <- %.lex.c <- %.l
  344. # %.tab.o <- %.tab.[ch] <- %.y
  345. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  346. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  347. # Descending
  348. # ---------------------------------------------------------------------------
  349. PHONY += $(subdir-ym)
  350. $(subdir-ym):
  351. $(Q)$(MAKE) $(build)=$@
  352. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  353. # ---------------------------------------------------------------------------
  354. PHONY += FORCE
  355. FORCE:
  356. # Read all saved command lines and dependencies for the $(targets) we
  357. # may be building above, using $(if_changed{,_dep}). As an
  358. # optimization, we don't need to read them if the target does not
  359. # exist, we will rebuild anyway in that case.
  360. targets := $(wildcard $(sort $(targets)))
  361. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  362. ifneq ($(cmd_files),)
  363. include $(cmd_files)
  364. endif
  365. # Declare the contents of the .PHONY variable as phony. We keep that
  366. # information in a variable se we can use it in if_changed and friends.
  367. .PHONY: $(PHONY)